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Cambridge GaN Devices will demonstrate at APEC that the company’s ICeGaN® GaN ICs can now satisfy a broad range of applications with higher power requirements, such as servers, data centres, inverters, industrial power supplies and, very soon, automotive EVs over100 kW. The company’s new P2 series ICs feature RDS(on) levels down to 25 mΩ, supporting multi kW power levels with the highest efficiency, and a secure supply chain is in place including manufacturing deals with TSMC and ASE, and distribution through Digi-Key.
HENRYK DABROWSKI | SENIOR VICE PRESIDENT OF GLOBAL SALES, CGD
“GaN is now widely accepted as the technology of choice for mobile device chargers and is now set to supersede traditional silicon MOSFETs in higher power applications. The industry is also beginning to realize that GaN may replace SiC in certain high efficiency designs, due to its lower manufacturing cost. At APEC – one of the world’s most important events for the power industry – we are eagerly looking forward to having in-depth discussions with designers of high efficiency power systems and demonstrating the ruggedness, reliability and ease of use of our ICeGaN® GaN IC technology.”
During APEC, CGD will give the following Industry Session and Exhibitor Presentations:
Unlocking the Potential of Multi-level Inverters with Integrated ICeGaN technologies (Session: IS14.7)
As the electric vehicle market develops, there is a continuous drive to look at new and novel approaches to further improve the efficiency of the traction inverter and other electrical subsystems.Multi-level inverters enable the use of much high switching frequencies and break down the total voltage into smaller steps, which in turn allows for improved efficiency and downsizing of other parts of the system. GaN technology optimizes the benefits of multi-level topologies. CGD’s ICeGaN technology brings a higher level of integration, lower cost, best in class robustness and ease of use.
Presenter: Daniel Murphy, Director of Technical Marketing, CGD Date: Wednesday March 19, 2025 Time: 4:30 PM – 4:55 PM ET Location: Level Four, A411
ICeGaN Leads the Industry in GaN Integration
This presentation will demonstrate how ICeGaN technology leads in simplification, cost reduction, robustness, carbon footprint and efficiency of GaN power applications.Presenter: Peter Di Maso, Vice President, Business Development, CGD Date: Wednesday, March 19, 2025 Time: 12:45 PM – 1:15 PM ET Location: A301
On booth 2039, CGD will present demos that highlight the benefits of employing its ICeGaN technology in three application spaces: Motor Drives
- ICeGaN vs discrete GaN circuits comparison in half-bridge (daughter cards) demo board
- High and low power QORVO motor drive evaluation kits utilising ICeGaN and developed in collaboration with CGD
- Half-bridge built using CGD’s ICeGaN ICs in the BHDFN (Bottom Heat-spreader DFN) bottom-side cooled package with wettable flanks for easy inspection
Data Centres
- 3 kW totem-pole PFC evaluation board
- Half-bridge built using CGD’s BHDFN-packaged ICeGaN ICs
- Full-bridge demo showing CGD’s ICeGaN ICs in the DHDFN (Dual Heat-spreader DFN) package which has low thermal resistance (Rth(JC)), and can be operated with bottom-side, top-side and dual-side cooling. This package offers flexibility in design and out-performs the often-used TOLT package in top-side and, especially, dual-side cooled configurations.
- 2.5kW GaN-based CCM totem-pole PFC reference design targetting LED drivers, industrial brick DC/DC and general PSUs with power range of 500W to 1.5kW.
Scalable Power
- New single IC ICeGaN technology platform that delivers over 100kW, enabling CGD to address the $10B+ EV market, currently dominated by SiC, with cost-effective GaN solutions
- Single leg of a 3-phase 800 V automotive inverter demo board, developed in partnership with French public R&I institute, IFP Energies nouvelles (IFPEN)
- Parallel evaluation board demoing ICeGaN’s higher power capabilities
- Full-bridge demo showing CGD’s ICeGaN ICs in the DHDFN package
GIORGIA LONGOBARDI | FOUNDER AND CEO, CGD
“This is an exciting time for our industry as it embraces the disruptive GaN technology. Although this change from silicon has indisputably shown the power density and efficiency benefits of GaN, only CGD is presenting this new technology in an easy-to-use solution, which has been proven to be the most rugged in the industry. With our technology roadmap which details how ICeGaN will be able to address even EV applications over 100kW, we are sure designers will be inspired by the possibilities that ICeGaN has opened up.”
Original – Cambridge GaN Devices
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Toshiba Electronic Devices & Storage Corporation has launched a gate driver photocoupler, “TLP5814H,” with an output of +6.8A/-4.8A, in a small size SO8L package, that incorporates an active Miller clamp function for driving silicon carbide (SiC) MOSFETs.
In circuits such as inverters, where MOSFETs or IGBTs are used in series, gate voltage can be generated by a Miller current when the lower arm is turned off, causing malfunctions such as short circuits in the upper and lower arms. A commonly used protection function to prevent this is the application of a negative voltage to the gate when it is turned off.
For some SiC MOSFETs, which commonly feature higher voltage, lower on-resistance and faster switching characteristics than silicon (Si) MOSFETs, sufficient negative voltage cannot be applied between the gate and source. In this case, an active Miller clamp circuit can be used to flow the Miller current from the gate to ground, preventing the short circuiting without the need to apply the negative voltage. However, there are cost-cutting designs that reduce the negative voltage applied to the gate when the IGBTs are turned off, and in these cases, gate drivers with a built-in active Miller clamp are an option for consideration.
The new product has a built-in active Miller clamp circuit, so there is no need for an additional power supply for negative voltage and external active Miller clamp circuits. This provides a safety function for the system and also promotes system miniaturization by reducing the number of external circuits. The active Miller clamp circuit has a channel resistance of 0.69Ω (typ.) and a peak clamp sinking current rating of 6.8A, making it suitable as a gate driver for SiC MOSFETs, which are highly sensitive to changes in gate voltage.
TLP5814H has an operating temperature rating of -40 to 125°C, achieved by enhancing the optical output of the infrared emitting diode on the input side and optimizing the design of the photo detector devices (photodiode arrays) to improve optical coupling efficiency.
This makes it suitable for industrial equipment that require strict thermal management, such as photovoltaic (PV) inverters and uninterruptible power supplies (UPSs). Its propagation delay time and propagation delay skew are also specified in the operating temperature rating range. Its package, a small size SO8L, 5.85×10×2.1mm (typ.), helps improve the flexibility of parts layout on a system board. In addition, it features a minimum creepage distance of 8.0mm, allowing it to be used for applications requiring high insulation performance.
Toshiba will continue to develop photocoupler products that contribute to enhancing the safety function of industrial equipment.
Original – Toshiba
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onsemi disclosed details of a proposal submitted to the Board of Directors of Allegro MicroSystems, Inc. to acquire the company for $35.10 per share in cash for each share of Allegro’s common stock on a fully diluted basis at an implied enterprise value of $6.9 billion.
onsemi has made numerous attempts over the past six months to enter into constructive discussions regarding a potential transaction. The most recent Proposal was submitted to Allegro on February 12, 2025, and represents an increase over an initial $34.50 per share proposal submitted on September 2, 2024.
“We believe the combination of onsemi and Allegro would bring two highly complementary businesses together, benefitting our respective customers and delivering immediate value to Allegro shareholders,” said Hassane El-Khoury, President and Chief Executive Officer of onsemi. “The Allegro team has built an impressive leadership position in magnetic sensing and power ICs for the automotive and industrial end-markets. Together, Allegro’s unique product portfolio and onsemi’s differentiated intelligent power and sensing technologies would create a diversified leader in automotive, industrial and AI data center applications.”
El-Khoury continued, “While we would have preferred to reach an agreement with Allegro privately, the decision to make our proposal public reflects our conviction in the merits of a combined company, which we believe is in the best interests of Allegro and onsemi shareholders. We urge the Allegro Board and management team to engage in good faith discussions with onsemi’s management team regarding the proposed transaction, which maximizes value for Allegro shareholders.”
The combination between onsemi and Allegro would create a natural strategic fit given both parties’ respective strengths within the automotive and industrial markets:
- Compelling Strategic Rationale That Delivers Benefits for Customers and Employees: Allegro’s product offering complements onsemi’s leadership in intelligent power and sensing for automotive, industrial and AI data center applications. A combination would bring together two strong teams with a shared culture of innovation and access to exciting new development opportunities within an expanded organization.
- Delivering Immediate and Certain Value for Allegro Shareholders: Under the terms of the Proposal, onsemi’s all-cash $35.10 per share offer represents a 57% premium to Allegro’s closing share price on February 28, 2025, the last trading day prior to media reports regarding onsemi’s interest in acquiring Allegro.
- Clear Path to Completion and Plan for Financing: onsemi has assembled a team of highly experienced advisors and is prepared to move swiftly and efficiently to complete due diligence and negotiate a mutually agreeable definitive agreement. The company does not anticipate any financing contingencies and intends to fund the potential transaction with a combination of committed financing, cash on hand, and funds available under its existing revolving credit facility.
onsemi first approached Allegro regarding a potential all-cash acquisition on September 2, 2024, via a formal letter with an initial all-cash $34.50 per share proposal. A follow-up letter was sent December 10, 2024, reaffirming onsemi’s desire to transact and gain access to find a pathway to diligence. Subsequently, onsemi made another attempt towards constructive engagement, most recently submitting a letter on February 12, 2025, improving its all-cash proposal to $35.10 per share, while also highlighting its numerous efforts to meaningfully engage with Allegro.
onsemi’s request since September 2, 2024, has been consistent: to advance the possibility of this valuable outcome for shareholders through rigorous management-to-management dialogue and pursuing the requisite diligence and scoping of regulatory requirements in order to expeditiously move towards finalization of a transaction.
Original – onsemi
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Renesas Electronics Corporation and Altium announced the introduction of Renesas 365, Powered by Altium, a first-of-its-kind industry solution designed to streamline electronics system development from silicon selection to system lifecycle management. This transformative solution will be demonstrated at embedded world, Booth 5-371, March 11-13, in Nuremberg, Germany, and is expected to be available in early 2026.
This introduction marks a pivotal moment following Renesas’ acquisition of Altium, underscoring the transformative potential of their combined expertise. Built on the Altium 365 platform, Renesas 365, Powered by Altium,eliminates inefficiencies, connects teams, enables solution discovery, and ensures digital continuity—accelerating development and empowering engineers to build better, smarter products.
Renesas 365 will tackle longstanding industry challenges. Embedded system development often suffers from manual component searches, fragmented documentation, and siloed teams. Renesas 365 addresses these challenges by connecting Altium’s advanced cloud platform with Renesas’ comprehensive embedded compute, analog & connectivity, and power portfolio. By integrating hardware, software, and lifecycle data into a single digital environment, it will streamline workflows, accelerate time to market, ensure digital traceability and real-time insights, and improve decision-making from concept to deployment.
“The introduction of Renesas 365 is a major milestone toward Renesas’ Digitalization vision. We envision making electronics design accessible to broader market to allow more innovation by creating an Electronics System Design and Lifecycle Management platform together with Altium,” said Hidetoshi Shibata, CEO of Renesas. “Renesas’ expertise in embedded semiconductor solutions and Altium’s leadership in electronics design and collaboration will enable a first-of-its-kind solution. Renesas 365 transforms how intelligent, connected electronic systems are designed, developed, and sustained.”
Renesas 365 is built on five interconnected solution pillars, ensuring seamless system-level integration and continuous digital context throughout the product lifecycle:
- Silicon – Serving as the foundation for modern electronic solutions, Renesas 365 ensures that every silicon component is application-ready and optimized for software-defined products. Whether for ultra-low-power IoT devices or demanding AI-driven applications, Renesas 365 delivers silicon that seamlessly integrates with the broader system.
- Discover – Powered by Altium, Discover enables engineers to find not just components but complete solutions from Renesas’ comprehensive portfolio for faster and more accurate system design.
- Develop – Powered by Altium, Develop provides a multidisciplinary cloud-based development environment, ensuring real-time collaboration across hardware, software, and mechanical teams.
- Lifecycle – Powered by Altium, Lifecycle establishes persistent digital traceability, enabling seamless over-the-air (OTA) updates and ensuring compliance and security from concept to deployment.
- Software – Provides AI-ready development tools to ensure software-defined systems are optimized for modern applications.
Renesas 365 is designed for the next generation of electronics innovation, aligning with emerging industry trends by providing a unified software framework for software-defined systems spanning low- to high-compute performance; AI-ready development tools that enable real-time, low-power AI inference at the edge; and advanced security, compliance tracking, and automated OTA updates to ensure secure lifecycle management.
Renesas 365 is more than a technological advancement—it is the next step in the digital transformation of electronics, bridging the gap between silicon and system development. By ensuring seamless collaboration, real-time decision-making, and persistent system context, Renesas and Altium will redefine how electronics systems are designed, developed, and sustained—from silicon selection to full system realization—in a connected world.
At embedded world, Renesas will bring Renesas 365 to life with a dynamic live demo, showcasing its power as a unified industry solution for modern electronics development. This seamless, cloud-connected platform enables engineers to move effortlessly from concept to prototype to fleet management.
Attendees will experience firsthand how Renesas 365 streamlines the design process, from silicon selection to embedded software development to Edge AI and over-the-air updates. The platform’s seamless integration ensures that existing workflows remain uninterrupted, supporting everything from custom AI models to advanced RTOS implementations like PX5 RTOS, helping to bridge the software gap between MCU and MPU worlds.
Original – Altium
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Despite challenging conditions, Siltronic AG demonstrated resilience in the 2024 financial year. Accordingly, the company achieved sales of EUR 1,412.8 million (2023: EUR 1,513.8 million) and an EBITDA of EUR 363.8 million (2023: EUR 433.9 million), confirming the figures published at the beginning of February. In an environment of continued weak demand, a solid EBITDA margin of 25.8 percent (2023: 28.7 percent) was achieved.
“Siltronic closed the 2024 financial year at the upper end of expectations and acted consistently in a difficult market environment,” says Dr. Michael Heckmeier, CEO of Siltronic AG. “Despite growing end markets, particularly through Artificial Intelligence, 2025 will also be characterized by the reduction of still elevated inventory levels at chip manufacturers and their customers. At the same time, we are continuously working on our costs to strengthen our competitiveness. With our new capacities and innovative strength, we are perfectly positioned for the upcoming recovery.”
Group sales decreased by 6.7 percent in the financial year 2024 – the guidance was in the high single-digit percentage range – to EUR 1,412.8 million. This was due to slightly negative price and product mix effects and a lower wafer area sold. The price decline was most pronounced for older product types with diameters up to 200 mm.
Cost of sales decreased by EUR 4.2 million year-over-year to EUR 1,137.4 million. This decrease was mainly due to the lower wafer area sold. Cost of sales decreased at a lower percentage than sales, primarily due to higher depreciation related to capital expenditures and lower fixed cost dilution. On the other hand, the cost for raw materials and supplies slightly decreased in line with the relative volume decline compared to the previous year. Overall, the gross margin decreased from 24.6 percent to 19.5 percent.
In order to mitigate risks from FX developments, Siltronic implemented currency hedging measures, which resulted in a net expense from exchange rate effects of EUR 0.3 million in 2024, compared to a gain of EUR 16.5 million in 2023.
In the reporting year, Siltronic achieved an EBITDA of EUR 363.8 million (2023: EUR 433.9 million). The EBITDA margin of 25.8 percent (2023: 28.7 percent) remained resilient despite the prolonged weak demand – the guidance was between 24 and 26 percent. The main reasons for the year-over-year decline in EBITDA margin are the lower sales level and a deteriorated result from FX effects. With the increase in depreciation due to the continued high capex activity by EUR 36.0 million, the operating result (EBIT) fell significantly to EUR 125.2 million, compared to EUR 231.3 million in the previous year.
The financial result decreased significantly to EUR -24.9 million (2023: EUR -0.5 million). This is partly due to a lower net result from financial investments, and partly due to loans to support the financing of capex, which led to a noticeable increase in interest expenses on loans.
In the past financial year, income taxes amounted to EUR 33.1 million (2023: EUR 29.5 million). The Group’s tax rate for the reporting year was 33 percent (2023: 13 percent). The higher tax rate is due to deferred tax effects. This resulted in a net profit of EUR 67.2 million (2023: EUR 201.3 million), of which EUR 63.0 million (2023: EUR 184.4 million) was attributable to the shareholders of Siltronic AG. Earnings per share reached EUR 2.10 compared to EUR 6.15 in the previous year.
In the past financial year, payments for capex including intangible assets significantly decreased to EUR 667.5 million, compared to EUR 1,112.1 million in the previous year. As expected, both the free cash flow (2024: EUR -323.0 million) and the net cash flow (2024: EUR -297.0 million) improved considerably year-over-year. However, the still elevated capex level once again resulted in both remaining clearly negative.
As of December 31, 2024, total assets, with significantly increased property, plant and equipment, reached EUR 5,084.4 million (previous year: EUR 4,504.9 million). The equity ratio remained at a healthy level of 43.6 percent (2023: 46.6 percent). The high capex at the end of 2023, some of which was not due for payment until 2024 led to payments for capex (EUR 667.5 million) significantly exceeding the balance sheet additions for the reporting year (EUR 523.4 million). The majority of balance sheet additions was allocated to the construction of the new 300 mm fab in Singapore. As a result, net financial debt increased by EUR 377.8 million to EUR 733.5 million (December 31, 2023: EUR 355.7 million).
For 2025, the Executive Board expects the end markets to grow again. After an increase of six percent in the previous year, a seven percent growth is forecast for 2025, with Artificial Intelligence applications being a key driver. However, this is mostly not expected to lead to an improvement in Siltronic’s sales performance due to the slowly decreasing inventory levels at chip manufacturers and their customers. Accordingly, the Executive Board expects sales to be in the same region as last year, assuming unchanged FX rates (EUR/USD: 1.08). H1 2025 is currently expected to be below H2 2024 by a high single-digit percentage range. The recent development of the Euro against the US dollar may help to mitigate this effect. The sales guidance takes into account the discontinuation of production of polished and epitaxial wafers up to 150 mm diameter in Burghausen as of July 31, 2025.
The EBITDA margin is expected to be in the range of 22 to 27 percent. The ramp costs for the new fab will be partially offset by savings in energy and other areas.
Depreciation and amortization will increase to EUR 380 to 440 million in 2025 due to the high capex in recent years. This increase is mainly due to the planned start of depreciation of major parts of the new Singapore fab in mid-2025.
Mainly due to the higher depreciation, the Executive Board expects EBIT in 2025 to be significantly lower than in the previous year.
As previously announced, capex will be further reduced and is expected to be in the range of EUR 350 to 400 million. As a result, the company expects a noticeable improvement in net cash flow, which will, however, remain significantly negative.
Original – Siltronic
