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Keysight Technologies, Inc. introduces the Electrical Structural Tester (EST), a wire bond inspection solution for semiconductor manufacturing that ensures the integrity and reliability of electronic components.
The semiconductor industry is faced with testing challenges due to the increasing density of chips in mission-critical applications such as medical devices and automotive systems. Current testing methodologies often fall short in detecting wire bond structural defects, which lead to costly latent failures. In addition, traditional testing approaches frequently rely on sampling techniques that do not adequately identify wire bond structural defects.
The EST addresses these testing challenges by using cutting-edge nano Vectorless Test Enhanced Performance (nVTEP) technology to create a capacitive structure between the wire bond and a sensor plate. Using this method the EST can identify subtle defects such as wire sag, near shorts, and stray wires to enable a comprehensive assessment of wire bond integrity.
Key benefits of the EST include:
- Advanced defect detection – Identifies a wide range of wire bond defects, both electrical and non-electrical, by analyzing changes in capacitive coupling patterns to ensure the functionality and reliability of electronic components.
- High-volume manufacturing ready – Enables throughput of up to 72,000 units per hour through the ability to test up to 20 integrated circuits simultaneously, which boosts productivity and efficiency in high-volume production environments.
- Big data analytics integration: Captures defects and enhances yield through advanced methods like marginal retry test (MaRT), dynamic part averaging test (DPAT), and real-time part averaging test (RPAT).
Carol Leh, Vice President, Electronic Industrial Solutions Group Center of Excellence, Keysight, said: “Keysight is dedicated to pioneering innovative solutions that address the most pressing challenges in the wire bonding process. The Electrical Structural Tester empowers chip manufacturers to enhance production efficiency by rapidly identifying wire bond defects, ensuring superior quality and reliability in high-volume manufacturing.”
The Electrical Structural Tester will be showcased at the Keysight booth (K3283) at SEMICON Taiwan 2024, Taipei Nangang Exhibition Center Hall 1, September 4-6, 2024.
Original – Keysight Technologies
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Toshiba Electronics Europe GmbH has launched a small new intelligent power device (IPD) for space-constrained brushless DC (BLDC) motor drive applications such as air conditioners, air purifiers, and pumps.
The new IPD (TPD4165K) has an increased maximum output current of 3A, compared to the 2A rating of Toshiba’s existing products like TPD4163K, or TPD4164K. This extends the range of supported equipment and allows use in higher power applications. The device is suitable for sine-wave drive.
As power supply voltage may fluctuate significantly in some regions where the IP could be used, the absolute maximum voltage rating (VBB) has been increased to 600V to enhance long-term reliability. This represents a 20% increase over Toshiba’s previous products (TPD4123K, TPD4123AK, TPD4144K, TPD4144AK, TPD4135K, TPD4135AK).
The new TPD4165K is housed in a through-hole HDIP30 package. This has a 21% smaller footprint than the DIP26 package used for many of Toshiba’s previous products, simplifying the design process for challenging space-constrained applications. The new device measures just 32.8mm x 13.5mm x 3.525mm. It supports either three-shunt or single-shunt resistor circuit for current sensing.
Built into the new IPD is a range of safety features including over-current, under-voltage and thermal shutdown. Additionally, an external signal can be applied to the SD pin to control the behaviour of the output stage. The DIAG output pin provides the status of the safety conditions.
Designers can freely access a reference design for a sensorless BLDC motor drive circuit based upon the new TPD4165K and Toshiba’s TMPM374FWUG microcontroller with vector control engine capability. The reference design data can be downloaded from Toshiba’s website.
Toshiba will continue to expand its product range by adding devices with improved characteristics. This will assist designers by improving design flexibility as well as contributing to carbon neutrality through energy-saving motor control.
Original – Toshiba
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onsemi released the newest generation silicon and silicon carbide hybrid Power Integrated Modules (PIMs) in an F5BP package, ideally suited to boost the power output of utility-scale solar string inverters or energy storage system (ESS) applications. Compared to previous generations, the modules offer increased power density and higher efficiencies within the same footprint to increase the total system power of a solar inverter from 300kW up to 350kW.
This means a one-gigawatt (GW) capacity utility-scale solar farm using the latest generation modules can achieve an energy savings of nearly two megawatts (MW) per hour or the equivalent of powering more than 700 homes per year. Additionally, fewer modules are required to achieve the same power threshold as the previous generation, which can reduce power device component costs by more than 25%.
With solar power having achieved the lowest levelized cost of energy (LCOE), it is increasingly becoming the go-to source for renewable power generation around the world. To compensate for solar power’s variability, utility operators are also adding large-scale battery energy storage systems (BESS) to ensure a stable energy flow to the grid. To support this combination of systems, manufacturers and utilities require solutions that offer maximum efficiency and reliable power conversion. Every 0.1% of efficiency improvement can equate to a quarter of a million dollars in annual operational savings for every one gigawatt of installed capacity.
“As a variable energy source dependent on sunlight, continual advances in increasing system efficiencies, reliability and advanced storage solutions are needed to be able to maintain the stability and reliability of global grids during peak and off-peak power demand,” said Sravan Vanaparthy, vice president, Industrial Power Division, Power Solutions Group, onsemi. “A more efficient infrastructure increases adoption and assures us that, as more solar power generation is built out, less energy is wasted and pushes us forward on a path away from fossil fuels.”
The F5BP-PIMs are integrated with 1050V FS7 IGBT and the 1200V D3 EliteSiC diode to form a foundation that facilitates high voltage and high current power conversion while reducing power dissipation and increasing reliability. The FS7 IGBTs offer low turn-off losses and reduce switching losses by up to 8%, while the EliteSiC diodes provide superior switching performance and lower voltage flicker by 15% compared to previous generations.
These PIMs employ an innovative I-type Neutral Point Clamp (INPC) for the inverter module and a flying capacitor topology for the boost module. The modules also use an optimized electrical layout and advanced Direct Bonded Copper (DBC) substrates to reduce stray inductance and thermal resistance. In addition, a copper baseplate further decreases thermal resistance to the heat sink by 9.3%, ensuring the module remains cool under high operational loads. This thermal management is crucial in maintaining the efficiency and longevity of the modules, making them highly effective for demanding applications that require reliable and sustained power delivery.
Original – onsemi
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PANJIT announced a strategic partnership with National Kaohsiung University of Science and Technology (NKUST). This collaboration bridges the gap between academia and industry, marking a significant step in semiconductor talent development.
Through this partnership, PANJIT and NKUST will establish a comprehensive platform that connects the educational and industrial spheres. PANJIT will offer NKUST students extensive industry insights and internship opportunities, allowing them to apply their theoretical knowledge in real-world settings.
Champion Microelectronic Corp., a member of the PANJIT Group, will collaborate with Professors Jenn-Yu Lin and Cheng-Liang Huang of NKUST’s Department of Microelectronics Engineering and their students on a high-end IC product development project targeting the automotive, industrial control, and automated factory sectors. This initiative aims to meet the growing demand for high-end semiconductors in the global green energy market.
Jason Fang, President of PANJIT Group, stated, “PANJIT is dedicated to building a tier 1 international corporation that our employees are proud of while fostering social engagement. Cultivating talent is a key part of this vision and essential for sustainable industrial development. We believe that a close partnership with academia can drive innovation and accelerate industry progress. In terms of our ESG development strategy, we strive to balance environmental protection, social responsibility, and corporate governance. We are actively engaged in green initiatives, including renewable energy projects, afforestation, forest ecosystem conservation, connecting with local culture and nurturing talent, creating a pleasant work environment for employees, and upholding core values of integrity. More importantly, we aim to pass on PANJIT’s values and technologies to future generations, working together toward a more sustainable future.”
President Ching-Yu Yang of National Kaohsiung University of Science and Technology (NKUST) pointed out that “the establishment of world-class companies in Kaohsiung and the active moves by top universities in the north to enter Kaohsiung are positive signals for the development prospects of the Southern Semiconductor S Corridor. NKUST has long been deeply rooted in southern Taiwan, establishing close cooperative relationships with various industries.
In the trend of rapid industrial transformation towards intelligence and automation, the direction of technological application and talent cultivation must closely align with industrial development trends to strengthen long-term industrial competitiveness. The two key factors in strengthening Taiwan’s industrial competitiveness are technology and talent. Recently, NKUST received a grant of more than NT$100 million from the Ministry of Education to build a “Semiconductor Process Equipment Technology Talent Training Base” in the Department of Microelectronics Engineering of College of Electrical Engineering and Computer Science to strengthen the cultivation of semiconductor technology talents.
Now, the cooperation between NKUST and the PANJIT Group can create mutual benefits in the two critical areas of research/development applications and talent cultivation. ”President Ching-Yu Yang is very much looking forward to deepening the cooperation between the two parties in the future. He stated, “Playing the role of a strong supporter in national industrial research & development and talent cultivation is an unshakable mission for NKUST.”
This collaboration extends beyond talent development to include technology exchange, setting a precedent for future industry-academia partnerships and encouraging more enterprises and institutions to contribute to nurturing the next generation of talent.
Original – PANJIT International
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MCC Semi unveiled a new 950V MOSFET – MCU1K4N95SH. While traditional MOSFETs often include energy losses and slower switching, this new superjunction (SJ) MOSFET features a low gate-to-drain charge, significantly reducing conduction losses and amplifying overall efficiency.
Its superjunction MOSFET technology and on-resistance of only 1.49Ω empower engineers to design for higher voltage ratings without compromising performance. A DPAK (TO-252) package only adds to this MOSFET’s versatility, making it ideal for AC-DC power supplies, LED lighting, charging adapters, solar and energy devices, and other high-voltage applications across multiple industries.
Features & Benefits:
- Superjunction (SJ) MOSFET technology enhances efficiency
- High-voltage rating of 950V is well-suited for demanding applications
- Low gate charge enables faster switching speeds
- High-speed switching capabilities improve overall performance
Original – Micro Commercial Components
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Wolfspeed, Inc. announced its results for the fourth quarter of fiscal 2024 and the full 2024 fiscal year.
Quarterly Financial Highlights (Continuing operations only. All comparisons are to the fourth quarter of fiscal 2023.)
- Consolidated revenue of approximately $201 million, as compared to approximately $203 million
- Mohawk Valley Fab contributed approximately $41 million in revenue
- Power device design-ins of $2.0 billion
- Quarterly design-wins of $0.5 billion
- GAAP gross margin of 1%, compared to 29%
- Non-GAAP gross margin of 5%, compared to 31%
- GAAP and non-GAAP gross margins for the fourth quarter of fiscal 2024 include the impact of $24 million of underutilization costs. See “Start-up and Underutilization Costs” below for additional information.
Full Fiscal Year Financial Highlights (all comparisons are to fiscal 2023)
- Consolidated revenue of approximately $807 million, as compared to approximately $759 million
- GAAP gross margin of 10% as compared to 32%
- Non-GAAP gross margin of 13% as compared to 35%
- GAAP and non-GAAP gross margins for fiscal 2024 include the impact of approximately $124 million of underutilization costs. See “Start-up and Underutilization Costs” below for additional information.
“We have two priorities we are focused on: optimizing our capital structure for both the near term and long term and driving performance in our state-of-the-art, 200-millimeter fab, and this quarter was a step forward on both of these priorities,” said Wolfspeed CEO, Gregg Lowe.
“We achieved 20% utilization at Mohawk Valley in June and continued to see strong revenue growth from that fab. Our 200mm device fab is currently producing solid results, which are at significantly lower costs than our Durham 150mm fab. This improved profitability gives us the confidence to accelerate the shift of our device fabrication to Mohawk Valley, while we assess the timing of the closure of our 150mm device fab in Durham. At the JP, we have also made great progress, installing and activating initial furnaces in the fourth quarter. We have already processed the first silicon carbide boules from the JP and the quality is in line with the high-quality materials coming out of Building 10.
“At the same time, we are taking proactive steps to slow down the pace of our CapEx by approximately $200 million in fiscal 2025 and identify areas across our entire footprint to reduce operating costs. We also remain in constructive talks with the CHIPS office on a Preliminary Memorandum of Terms for capital grants under the CHIPS Act. In addition to any potential capital grants from the CHIPS program, our long-term CapEx plan is expected to generate more than $1 billion in cash refunds from Section 48D tax credits from the IRS, of which we’ve already accrued approximately $640 million on our balance sheet,” continued Lowe.
Business Outlook:
For its first quarter of fiscal 2025, Wolfspeed targets revenue from continuing operations in a range of $185 million to $215 million. GAAP net loss is targeted at $226 million to $194 million, or $1.79 to $1.54 per diluted share. Non-GAAP net loss from continuing operations is targeted to be in a range of $138 million to $114 million, or $1.09 to $0.90 per diluted share.
Targeted non-GAAP net loss excludes $88 million to $80 million of estimated expenses, net of tax, primarily related to stockbased compensation expense, amortization of discount and debt issuance costs, net of capitalized interest, project, transformation and transaction costs and loss on Wafer Supply Agreement.
The GAAP and non-GAAP targets from continuing operations do not include any estimated change in the fair value of the shares of common stock of MACOM Technology Solutions Holdings, Inc. (MACOM) that we acquired in connection with the sale to MACOM of our RF product line (RF Business Divestiture).
Start-up and Underutilization Costs:
As part of expanding its production footprint to support expected growth, Wolfspeed is incurring significant factory start-up costs relating to facilities the Company is constructing or expanding that have not yet started revenue generating production. These factory start-up costs have been and will be expensed as operating expenses in the statement of operations.
When a new facility begins revenue generating production, the operating costs of that facility that were previously expensed as start-up costs are instead primarily reflected as part of the cost of production within the cost of revenue, net line item in our statement of operations. For example, the Mohawk Valley Fab began revenue generating production at the end of fiscal 2023 and the costs of operating this facility in fiscal 2024 and going forward are primarily reflected in cost of revenue, net.
During the period when production begins, but before the facility is at its expected utilization level, Wolfspeed expects some of the costs to operate the facility will not be absorbed into the cost of inventory. The costs incurred to operate the facility in excess of the costs absorbed into inventory are referred to as underutilization costs and are expensed as incurred to cost of revenue, net. These costs are expected to continue to be substantial as Wolfspeed ramps up the facility to the expected or normal utilization level.
Wolfspeed incurred $20.5 million of factory start-up costs and $24.0 million of underutilization costs in the fourth quarter of fiscal 2024. No underutilization costs were incurred in the fourth quarter of fiscal 2023.
For the first quarter of fiscal 2025, operating expenses are expected to include approximately $25 million of factory start-up costs primarily in connection with materials expansion efforts. Cost of revenue, net, is expected to include approximately $24 million of underutilization costs in connection with the Mohawk Valley Fab.
Original – Wolfspeed
- Consolidated revenue of approximately $201 million, as compared to approximately $203 million
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Analog Devices, Inc. announced financial results for its fiscal third quarter 2024, which ended August 3, 2024.
“ADI’s revenue finished above our guided midpoint with stronger profitability driving earnings per share near the high end of our outlook,” said Vincent Roche, CEO and Chair. “As we navigate this business cycle’s nascent recovery, our high-performance analog solutions portfolio positions us well to intersect the strong underlying stream of concurrent secular trends. Our innovation and customer-centric ethos will continue to form the foundation for our success and help drive long-term shareholder value.”
“Improved customer inventory levels and order momentum, across most of our markets, position us to grow again sequentially in our fourth quarter, increasing our confidence that we are past the trough of this cycle. However, economic and geopolitical uncertainty continues to limit the pace of the recovery” said Richard Puccio, CFO.
Performance for the Third Quarter of Fiscal 2024 (PDF)
Outlook for the Fourth Quarter of Fiscal Year 2024
For the fourth quarter of fiscal 2024, we are forecasting revenue of $2.40 billion, +/- $100 million. At the midpoint of this revenue outlook, we expect reported operating margin of approximately 22.3%, +/-180 bps, and adjusted operating margin of approximately 41.0%, +/-100 bps. We are planning for reported EPS to be $0.85, +/-$0.10, and adjusted EPS to be $1.63, +/-$0.10.
Our fourth quarter fiscal 2024 outlook is based on current expectations and actual results may differ materially as a result of, among other things, the important factors discussed at the end of this release. These statements supersede all prior statements regarding our business outlook set forth in prior ADI news releases, and ADI disclaims any obligation to update these forward-looking statements.
The adjusted results and adjusted anticipated results above are financial measures presented on a non-GAAP basis. Reconciliations of these non-GAAP financial measures to their most directly comparable GAAP financial measures are provided in the financial tables included in this release. See also the “Non-GAAP Financial Information” section for additional information.
Dividend Payment
The ADI Board of Directors has declared a quarterly cash dividend of $0.92 per outstanding share of common stock. The dividend will be paid on September 17, 2024 to all shareholders of record at the close of business on September 3, 2024.
Original – Analog Devices
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Alpha and Omega Semiconductor Limited (AOS) announced its new highly robust power MOSFET LFPAK 5×6 package. AOS’s new LFPAK product offering is available in a wide range of voltages: 40V, 60V, and 100V, and it is designed to withstand harsh environments while maintaining MOSFET performance. The new devices are found in a broad range of applications such as industrial, server power, telecommunications, and solar, where high reliability is required.
AOS’s LFPAK packaging enables higher board-level reliability due to key packaging features such as gull wing leads, which offer a ruggedized solution for board-level environmental stresses. The gull-wing leads also enable optical inspection during PCBA manufacturing. Another feature enhancement is the LFPAK’s larger copper clip, which improves electrical and thermal performance. Advantages of the large clip include improved current handling capabilities, reduced on-resistance, and better heat dispersion compared to wire bonding. A large clip also has low parasitic inductance, enabling lower spike voltage in switching applications. All these features significantly improve the robustness of the MOSFET, and utilizing AOS’s advanced shielded gate MOSFET Technology (AlphaSGT™) enables designers to find an optimized solution to achieve high reliability under the harshest environmental conditions.
“Designers have long trusted AOS power semiconductors in their applications, and LFPAK 5×6 will expand
solution capability,” said Peter H. Wilson, Marketing Sr. Director of the MOSFET product line at AOS.Original – Alpha and Omega Semiconductor
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JEDEC Solid State Technology Association, the global leader in the development of standards for the microelectronics industry, announced that it is hosting an Automotive Electronics Forum on September 19, 2024 in San Jose, CA. There is no charge to attend, but advance registration is required and space is limited.
The Forum offers an impressive lineup of influential speakers covering a diverse range of innovative topics related to automotive electronics, including keynote presentations from Ford Motor Company, Micron, Rivian, Samsung, SK Hynix, and STMicroelectronics. Speakers from Infineon, Keysight, MIPI, Monolithic Power Systems, Synopsys, TI, VisIC Technologies and Wolley round out the agenda. There’s something for everyone looking to stay ahead in this dynamic field.
Mian Quddus, Chairman of the JEDEC Board of Directors, said: “We are delighted to invite industry professionals to join us and gain inspiration from the leading companies that are shaping the future of automotive technology.” He added, “Supporting the industry through educational outreach is an integral part of JEDEC’s mission, and we look forward to welcoming attendees to the JEDEC Automotive Electronics Forum next month.”
Original – JEDEC
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Texas Instruments (TI) and the U.S. Department of Commerce have signed a non-binding Preliminary Memorandum of Terms for up to $1.6 billion in proposed direct funding under the CHIPS and Science Act to support three 300mm wafer fabs already under construction in Texas and Utah. In addition, TI expects to receive an estimated $6 billion to $8 billion from the U.S. Department of Treasury’s Investment Tax Credit for qualified U.S. manufacturing investments. The proposed direct funding, coupled with the investment tax credit, would help TI provide a geopolitically dependable supply of essential analog and embedded processing semiconductors.
“The historic CHIPS Act is enabling more semiconductor manufacturing capacity in the U.S., making the semiconductor ecosystem stronger and more resilient,” said Haviv Ilan, president and CEO of Texas Instruments. “Our investments further strengthen our competitive advantage in manufacturing and technology as we expand our 300mm manufacturing operations in the U.S. With plans to grow our internal manufacturing to more than 95% by 2030, we’re building geopolitically dependable, 300mm capacity at scale to provide the analog and embedded processing chips our customers will need for years to come.”
Since its founding more than 90 years ago, TI has been advancing technology, pioneering the transition from vacuum tubes to transistors and then to integrated circuits. Today, TI is the largest U.S. analog and embedded processing semiconductor manufacturer. TI chips are essential in nearly every type of electronic device, from cars with advanced safety and intelligence systems to life-saving medical equipment and smart appliances that make homes safer and more efficient.
The proposed direct funding under the CHIPS Act would support TI’s investment of more than $18 billion through 2029, which is part of the company’s broader investment in manufacturing. This proposed direct funding will support three new wafer fabs, two in Sherman, Texas, (SM1 and SM2) and one in Lehi, Utah (LFAB2), specifically to:
- Construct and build the SM1 cleanroom and complete pilot line for first production;
- Construct and build the LFAB2 cleanroom for first production; and
- Construct the SM2 shell.
These connected, multi-fab sites benefit from shared infrastructure, talent and technology sharing, and a strong network of suppliers and community partners. They will produce semiconductors in 28nm to 130nm technology nodes, which provide the optimal cost, performance, power, precision and voltage levels required for TI’s broad portfolio of analog and embedded processing products.
“With this proposed investment from the Biden-Harris Administration in TI, a global leader of production for current-generation and mature-node chips, we would help secure the supply chain for these foundational semiconductors that are used in every sector of the U.S. economy, and create tens of thousands of jobs in Texas and Utah,” said U.S. Secretary of Commerce Gina Raimondo. “The CHIPS for America program will supercharge American technology and innovation and make our country more secure – and TI is expected to be an important part of the success of the Biden-Harris Administration’s work to revitalize semiconductor manufacturing and development in the U.S.”
With a long history of supporting its employees to build long-term, successful careers, TI is also investing in building its future workforce. TI will create more than 2,000 company jobs across its three new fabs in Texas and Utah, along with thousands of indirect jobs for construction, suppliers and supporting industries.
“We are proud to work with Texas Instruments as they build new semiconductor fabs in Sherman and solidify Texas as the best state for semiconductors. Texas Instruments invented the microchip in Texas, and we are honored to be home to TI’s semiconductor manufacturing facilities in Dallas, Richardson and Sherman,” said Texas Gov. Greg Abbott. “With this latest project, TI is building on its more than 90-year legacy in Texas and adding thousands of good-paying jobs for Texans to manufacture critically important technology.”
“By investing in semiconductor manufacturing, we are helping secure this vulnerable supply chain, boosting our national security and global competitiveness, and creating new jobs for Texans,” said U.S. Sen. John Cornyn. “The chipmaking capabilities these resources will enable at Texas Instruments will help the U.S. reclaim its leadership role in the critically important semiconductor industry, and I look forward to seeing more Texas-led advancements in the years to come.”
In order to build a future-ready workforce, TI is enhancing the skills of current employees, expanding internships and creating pipeline programs with a focus on building electronic and mechanical skills. TI has robust engagements with 40 community colleges, high schools and military institutions across the U.S. to develop future semiconductor talent.
“Utah is thrilled that Texas Instruments is expanding its manufacturing presence in the Silicon Slopes, furthering the impact Utahns have on critical semiconductor technology,” said Utah Gov. Spencer Cox. “This investment in semiconductor manufacturing not only creates more jobs, but also brings supply chains back to the United States.”
“This proposed CHIPS funding will further support Texas Instruments’ investment in its new semiconductor fab in Lehi —and enhance Utah’s vital role in our national defense and economic success,” said U.S. Senator Mitt Romney. “I was an original sponsor of the CHIPS and Science Act—which made today’s announcement possible—because in order to compete on the world stage, we must continue to promote innovation, foster scientific talent, and expand research here at home. Texas Instruments’ expanded operations will help make the United States more self-reliant for chips essential to our national security and economy.”
TI has a long-standing commitment to responsible, sustainable manufacturing and environmental stewardship. As part of this commitment, TI continually invests in its fabrication processes and equipment to reduce energy, material and water consumption, and greenhouse gas (GHG) emissions.
The company’s 300mm wafer fabs will be entirely powered by renewable electricity. Additionally, all of TI’s new 300mm fabs are designed to meet LEED Gold standards for structural efficiency and sustainability. TI’s 300mm manufacturing facilities bring advantages in reducing waste and improving water and energy consumption per chip.
TI semiconductors are and will increasingly play a critical role in helping reduce the impact on the environment, helping customers create smaller, more efficient and cost-effective technology solutions that in turn drive continued innovation in electrification and the expanded usage of renewable energy.
Original – Texas Instruments
