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Wolfspeed, Inc. announced its results for the second quarter of fiscal 2024.
Quarterly Financial Highlights (Continuing operations only. All comparisons are to the second quarter of fiscal 2023):
- Consolidated revenue of $208.4 million, compared to $173.8 million
◦ Mohawk Valley Fab contributed $12 million in revenue, a 3x increase from the prior quarter - Power device design-ins of $2.1 billion
- Quarterly record design-wins of $2.9 billion – over 75% related to automotive applications
- GAAP gross margin of 13.3%, compared to 32.6%
- Non-GAAP gross margin of 16.4%, compared to 35.8%
◦ GAAP and non-GAAP gross margins for the second quarter of fiscal 2024 include the impact of $35.6 million of underutilization costs, representing approximately 1,700 basis points of gross margin - Completed sale of our RF Business to MACOM Technology Solutions Holdings, Inc. (MACOM) for $75 million in cash and 711,528 shares of MACOM common stock (the RF Business Divestiture)
“We’re proud of our results this quarter, which reflect robust execution of our strategy and fortify our vision for the future of Wolfspeed and silicon carbide,” said Wolfspeed CEO, Gregg Lowe. “We have made considerable progress at our Mohawk Valley facility, tripling revenue sequentially. Our successful scale-up of 200mm wafer production and continued qualification of high-quality EV products on 200mm substrates are critical steps in meeting the continued customer demand. This is demonstrated by a record $2.9 billion of design-wins, predominantly in the EV sector across multiple OEMs.”
Lowe continued, “Our steadfast commitment to our long-term goals is bolstered by the conversion of our design-ins into significant design-wins. This solidifies our confidence in the electrification trend, which increasingly depends on the widespread adoption of silicon carbide technology. We are pioneers in this transformative era, steering towards a more electrified and efficient future.”
Business Outlook:
For its third quarter of fiscal 2024, Wolfspeed targets revenue from continuing operations in a range of $185 million to $215 million. GAAP net loss from continuing operations is targeted at $134 million to $155 million, or $1.07 to $1.23 per diluted share. Non-GAAP net loss from continuing operations is targeted to be in a range of $71 million to $87 million, or $0.57 to $0.69 per diluted share.
Targeted non GAAP net loss from continuing operations excludes $63 million to $68 million of estimated expenses, net of tax, primarily related to stock-based compensation expense, amortization of discount and debt issuance costs, net of capitalized interest, project, transformation and transaction costs and loss on Wafer Supply Agreement. The GAAP and non-GAAP targets from continuing operations do not include any estimated change in the fair value of the shares of MACOM common stock that we acquired in connection with the RF Business Divestiture.
Original – Wolfspeed
- Consolidated revenue of $208.4 million, compared to $173.8 million
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Siltronic AG has achieved its annual targets for 2023 according to preliminary, unaudited figures. The company achieved preliminary sales of EUR 1,514 million, a decrease of approximately 16 percent compared to the record sales of EUR 1,805 million in 2022. The target for the year was a decline in sales of 15 to 17 percent.
The main reason for the year-on-year decline was significantly weaker demand from the semiconductor industry due to increased inventories in the value chain. Since Siltronic nevertheless succeeded to keep sales prices stable, a preliminary EBITDA of EUR 434 million was achieved in 2023, resulting in a continued solid EBITDA margin of 29 percent. This was also within the expected target range of 28 to 30 percent.
The EBITDA for the record year 2022 amounted to EUR 672 million, though it should be noted that this included a one-off compensation payment of EUR 50 million as a result of the failed tender offer by GlobalWafers. The adjusted comparative figure for the EBITDA margin in 2022 was therefore 34.4 percent.
“We achieved our 2023 targets in a challenging environment. In particular, the EBITDA margin of 29 percent is very solid given the sharp decline in sales. The year 2023 was also marked by the construction of our new 300 mm fab in Singapore, which is on schedule to start operations at the beginning of 2024. The new state-of-the-art fab will contribute to Siltronic’s significant profitable growth in the medium and long term,” commented Dr. Michael Heckmeier, CEO of Siltronic AG.
Compared to the previous year, cost of sales decreased at a slower rate than sales due to a reduction in fixed costs, higher depreciation and inflationary cost increases, particularly for raw materials, supplies and labor.
Preliminary earnings before interest and taxes (EBIT) were also significantly lower than in the previous year at EUR 231 million (2022: EUR 496 million, adjusted: EUR 446 million). Accordingly, the preliminary EBIT margin was 15 percent compared to an adjusted 24.7 percent in 2022.
Solid financial situation despite record investments
In the reporting year, Siltronic made record investments in property, plant and equipment and intangible assets of preliminary EUR 1,316 million (2022: EUR 1,074 million). This was mainly due to the new 300 mm wafer fab in Singapore and the expansion of the crystal pulling hall in Freiberg.
Considering the high future investments mentioned above, the preliminary net cash flow of EUR -664 million in 2023 is in line with expectations (2022: EUR -395 million). The high cash payments for capex and the dividend payment of EUR 90 million resulted in net financial debt of EUR 356 million by December 31, 2023 (2022: net financial assets of EUR 374 million).
Business development in Q4 2023
As announced, preliminary sales of EUR 357 million in Q4 2023 were slightly above the level of Q3 2023 (EUR 349 million). As expected, at a preliminary EUR 91 million, the EBITDA for Q4 2023 did not reach the level of the previous quarter (EUR 99 million), mainly due to a lower foreign exchange result, which is included in the balance of other operating income and expenses.
The preliminary quarterly EBIT amounted to EUR 37 million (Q3 2023: EUR 46 million). The EBIT margin reached 10 percent (Q3 2023: 13.3 percent). Despite increased investments, the preliminary net cash flow for Q4 2023 improved significantly to EUR -32 million (Q3 2023: EUR -215 million). This was mainly due to investment grants received in Q4 2023 and positive working capital effects.
Upcoming events
The audited financial results and the Annual Report 2023 will be published on March 12, 2024. On this day, the Management Board of Siltronic AG will hold a conference call with analysts and investors (in English only) at 10:00 am (CET). This call will be streamed over the Internet. The audio webcast will be available live and on demand on Siltronic’s website.
- March 12, 2024 Publication of the Annual Report 2023
- May 2, 2024 Quarterly Statement Q1 2024
- May 13, 2024 Annual General Meeting
- July 25, 2024 Half Year Report 2024
- October 24, 2024 Quarterly Statement Q3 2024
Original – Siltronic
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Qorvo® announced financial results for the Company’s fiscal 2024 third quarter ended December 30, 2023.
Strategic Highlights
- Grew quarterly revenue 44% year-over-year and exceeded high-point of revenue guidance by $49 million
- Recognized by top four China-based Android 5G OEMs with 2023 awards for innovation, quality, supply, technology and strategic partnership
- Signed definitive agreement to acquire Anokiwave, a leading supplier of high-performance silicon integrated circuits for intelligent active array antennas for D&A, SATCOM and 5G applications
On a GAAP basis, revenue for Qorvo’s fiscal 2024 third quarter was $1.074 billion, gross margin was 36.1%, operating loss was $42 million, and loss per share was $1.31. On a non-GAAP basis, gross margin was 43.8%, operating income was $237 million, and diluted earnings per share was $2.10.
Bob Bruggeworth, president and chief executive officer of Qorvo, said, “Strong execution by the Qorvo team resulted in robust December quarterly financial performance. During the quarter we continued to bring channel inventories down, and Qorvo shipments are now more closely aligned to end market demand. We are seeing incremental improvement in end market demand in the Android ecosystem, and we expect to achieve year-over-year revenue growth in all of Qorvo’s operating segments in the March quarter.”
Financial Commentary and Outlook
Grant Brown, chief financial officer of Qorvo, said, “Qorvo exceeded the mid-point of December quarterly guidance for revenue, gross margin and EPS, reflecting strong content on customer programs and improving channel inventories. During the quarter, Qorvo generated record cash flow from operations of $493 million and free cash flow of $467 million. Looking forward, we are capitalizing on global macro trends and multiyear technology upgrade cycles, and we expect this to support durable long-term growth.”
Qorvo’s current outlook for the March 2024 quarter is:
- Quarterly revenue of approximately $925 million, plus or minus $25 million
- Non-GAAP gross margin of approximately 42%
- Non-GAAP diluted earnings per share of approximately $1.20 at the midpoint of revenue
Original – Qorvo
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Wolfspeed, Inc. announced the expansion of an existing long-term silicon carbide wafer supply agreement with a leading global semiconductor company. The expanded agreement, which is now worth approximately $275 million in total, calls for Wolfspeed to supply the company with 150mm silicon carbide bare and epitaxial wafers, reinforcing both companies’ visions for an industry-wide transition from silicon to silicon carbide semiconductor power devices.
“As the global leader in silicon carbide wafer production, Wolfspeed is uniquely positioned to be a critical supplier of high-quality and advanced silicon carbide materials at scale. We will continue to be an important partner to power device manufacturers who need the highest-quality silicon carbide wafers to service their customers,” said Dr. Cengiz Balkas, SVP and GM of Materials for Wolfspeed.
“This agreement further strengthens our long-time partnership with a best-in-class power semiconductor manufacturer. Our collective efforts are helping to address the rapidly expanding opportunity for silicon carbide and better address the unfulfilled demand that exists in the marketplace today.”
The adoption of silicon carbide-based power solutions is rapidly growing across multiple markets, including industrial and EVs. Silicon carbide solutions enable smaller, lighter and more cost-effective designs, converting energy more efficiently to unlock new applications in electrification. This supply agreement will enable silicon carbide applications in a broad range of industries, such as: renewable energy and storage, electric vehicles, charging infrastructure, industrial power supplies, traction and variable speed drives.
Wolfspeed is the global leader in the manufacturing of silicon carbide wafers and epitaxial wafers. The company is currently expanding its manufacturing capacity in the United States and has plans to open a new, automated materials factory in Siler City, North Carolina later this year that will produce 200mm silicon carbide wafers. The new materials factory will increase Wolfspeed’s current materials production capacity by ten times.
Original – Wolfspeed
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JEDEC Solid State Technology Association announced the publication of JEP198: Guideline for Reverse Bias Reliability Evaluation Procedures for Gallium Nitride Power Conversion Devices. Developed by JEDEC’s JC-70.1 Gallium Nitride Subcommittee, JEP198 is available for free download from the JEDEC website.
JEP198 presents guidelines for evaluating the Time Dependent Breakdown (TDB) reliability of GaN power transistors. It is applicable to planar enhancement-mode, depletion-mode, GaN integrated power solutions, and cascode GaN power transistors.
This publication covers suggested stress conditions and related test parameters for evaluating the TDB reliability of GaN power transistors using the off-state bias. The stress conditions and test parameters for both High Temperature Reverse Bias Stress and Application Specific Stress-Testing are designed to evaluate the reliability of GaN transistors over their useful lifetime under accelerated stress conditions.
“We are becoming more dependent on power electronics in all facets of our daily lives. As such, the technologies behind those systems are advancing and so too must the device-specific qualification processes. The new GaN-focused Guideline for Reverse Bias Reliability Evaluation is a critical step toward achieving that goal,” said Ron Barr, VP of Quality and Reliability, Transphorm and Co-Chair of the Task Group 701_1.
“This was a collaborative effort conducted by both GaN semiconductor and end product manufacturers. I’m proud of the work the task group delivered. It is an important framework to ensure cross-industry uniformity that will, in the end, provide power system manufacturers the necessary confidence when designing with GaN devices.”
“With the rise of renewable energy and electrification of our lives, the efficiency of power semiconductors is becoming more critical. This is where GaN power semiconductors have proven to be a valuable technology. The Guideline for Reverse Bias Reliability Evaluation is another step in improving confidence in GaN Technology and the products that are on and being brought to market,” said Dr. Kurt Smith, VP of Reliability and Qualification at VisIC Technologies and Chair of JC-70.1.
“This document was developed through collaboration of the multi-corporation team of industry experts to represent the best practices for evaluating GaN devices. It was a long multi-year process to reach consensus and the team is to be commended for the quality document and all of the hard work that went into it.”
Original – JEDEC
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MIT and Applied Materials, Inc. announced an agreement today that, together with a grant to MIT from the Northeast Microelectronics Coalition (NEMC) Hub, commits more than $40 million of estimated private and public investment to add advanced nano-fabrication equipment and capabilities to MIT.nano, the Institute’s center for nanoscale science and engineering.
The collaboration will create a unique open-access site in the United States that supports research and development at industry-compatible scale using the same equipment found in high-volume production fabs to accelerate advances in silicon and compound semiconductors, power electronics, optical computing, analog devices and other critical technologies.
The equipment and related funding and in-kind support provided by Applied Materials will significantly enhance MIT.nano’s existing capabilities to fabricate up to 200mm (8-inch) wafers, a size essential to industry prototyping and production of semiconductors used in a broad range of markets including consumer electronics, automotive, industrial automation, clean energy and more. Positioned to fill the gap between academic experimentation and commercialization, the equipment will help establish a bridge connecting early-stage innovation to industry pathways to the marketplace.
“A brilliant new concept for a chip won’t have impact in the world unless companies can make millions of copies of it. MIT.nano’s collaboration with Applied Materials will create a critical open-access capacity to help innovations travel from lab bench to industry foundries for manufacturing,” said Maria Zuber, MIT’s Vice President for Research and E. A. Griswold Professor of Geophysics. “I am grateful to Applied Materials for its investment in this vision. The impact of the new toolset will ripple across MIT and throughout Massachusetts, the region, and the nation.”
Applied Materials is the world’s largest supplier of equipment for manufacturing semiconductors, displays and other advanced electronics. The company will provide at MIT.nano several state-of-the-art process tools capable of supporting 150 and 200mm wafers and will enhance and upgrade an existing tool owned by MIT. In addition to assisting MIT.nano in the day-to-day operation and maintenance of the equipment, Applied engineers will develop new process capabilities which will benefit researchers and students from MIT and beyond.
“Chips are becoming increasingly complex, and there is tremendous need for continued advancements in 200mm devices, particularly compound semiconductors like silicon carbide and gallium nitride,” said Aninda Moitra, Corporate Vice President and General Manager of Applied Materials’ ICAPS Business. “Applied is excited to team with MIT.nano to create a unique, open-access site in the U.S. where the chip ecosystem can collaborate to accelerate innovation. Our engagement with MIT expands Applied’s university innovation network and furthers our efforts to reduce the time and cost of commercializing new technologies while strengthening the pipeline of future semiconductor industry talent.”
The Northeast Microelectronics Coalition (NEMC) Hub, managed by the Massachusetts Technology Collaborative (MassTech), will allocate $7.7 million to enable the installation of the tools. The NEMC is the regional “hub” that connects and amplifies the capabilities of diverse organizations from across New England plus New Jersey and New York. The U.S. Department of Defense (DoD) selected the NEMC Hub as one of eight Microelectronics Commons Hubs and awarded funding from the CHIPS and Science Act to accelerate the transition of critical microelectronics technologies from lab-to-fab, spur new jobs, expand workforce training opportunities and invest in the region’s advanced manufacturing and technology sectors.
The Microelectronics Commons program is managed at the federal level by the Office of the Under Secretary of Defense for Research and Engineering (OUSD(R&E)) and the Naval Surface Warfare Center, Crane Division, and facilitated through the National Security Technology Accelerator (NSTXL), which organizes the execution of the eight regional hubs located across the country. The announcement of the public sector support for the project was made at an event attended by leaders from the DoD and NSTXL during a site visit to meet with NEMC Hub members.
“The installation and operation of these tools at MIT.nano will have a direct impact on the members of the NEMC Hub, the Massachusetts and Northeast regional economy, and national security. This is what the CHIPS and Science Act is all about,” said Ben Linville-Engler, Deputy Director at the MassTech Collaborative and the interim director of the NEMC Hub. “This is an essential investment by the NEMC Hub to meet the mission of the Microelectronics Commons.”
MIT.nano is a 200,000 square-foot facility located in the heart of the MIT campus with pristine, class-100 cleanrooms capable of accepting these advanced tools. Its open-access model means that MIT.nano’s toolsets and laboratories are available not only to the campus but also to early-stage R&D by researchers from other academic institutions, non-profit organizations, government and companies ranging from Fortune 500 multinationals to local startups. Vladimir Bulović, faculty director of MIT.nano, said he expects the new equipment to come online in early 2025.
“With vital funding for installation from NEMC and after a thorough and productive planning process with Applied Materials, MIT.nano is ready to install this toolset and integrate it into our expansive capabilities that serve over 1,100 researchers from academia, startups, and established companies,” said Bulović, who is also the Fariborz Maseeh Professor of Emerging Technologies in MIT’s Department of Electrical Engineering and Computer Science (EECS). “We’re eager to add these powerful new capabilities and excited for the new ideas, collaborations, and innovations that will follow.”
As part of its arrangement with MIT.nano, Applied Materials will join the MIT.nano Consortium, an industry program comprising 12 companies from different industries around the world. With the contributions of the company’s technical staff, Applied Materials will also have the opportunity to engage with MIT’s intellectual centers, including continued membership with the Microsystems Technology Laboratories (MTL).
Original – Applied Materials
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Power Integrations announced the release of the InnoSwitch™5-Pro family of high-efficiency, programmable flyback switcher ICs. The single-chip switcher achieves over 95 percent efficiency with a novel secondary-side control scheme which achieves zero-voltage switching (ZVS) without a dedicated and costly additional high voltage switch.
The new IC, which features a 750 V or a 900 V PowiGaN™ primary switch, primary-side controller, FluxLink™ isolated feedback and secondary controller with an I2C interface, optimizes the design and manufacture of compact, highly efficient single- or multi-port USB PD adapters. Applications are notebooks, high-end cellphones and other portable consumer products, including designs that require the new USB PD EPR (Extended Power Range) protocol.
Adnaan Lokhandwala, senior product marketing manager at Power Integrations said: “The combination of ZVS and GaN is power supply magic. Switching losses vanish, and we can leverage the low conduction losses of GaN to implement super dense adapter layouts with far fewer components than asymmetric half-bridge (AHB) circuits or active clamp alternatives. For example, we have demonstrated 140 W / 28 V USB PD adapters in 4.2 cubic inches using only 106 components. The flyback topology used by InnoSwitch5-Pro ICs is much easier to implement than AHB and can also operate from universal mains with or without a PFC stage.”
InnoSwitch5-Pro flyback switcher ICs feature lossless input line voltage sensing on the secondary side for adaptive DCM/CCM and ZVS control to maximize efficiency and simplify design across line and load. The ICs also feature a post-production tolerance offset to facilitate accurate output constant-current (CC) control of better than two percent to support the UFCS protocol.
Excellent efficiency – better than 95 percent – allows designers to eliminate heat sinks, spreaders and potting materials for thermal management, further reducing size, weight, component cost and manufacturing complexity. Key markets for the InnoSwitch5-Pro family of flyback switcher ICs include high-density USB PD 3.1 Extended Power Range (EPR), UFCS and multi-protocol adapters, notebook adapters and after-market single- and multi-port chargers and adapters.
Original – Power Integrations
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TTI, Inc. announced that the company is now an authorized distributor of PANJIT semiconductors. TTI is excited to now stock PANJIT’s high performance semiconductor products, giving electronics designers access to a wider range of components to suit their needs.
“We are excited to embark on a global partnership agreement with PANJIT which will further strengthen our portfolio of discrete components, bringing a leading range of diodes, MOSFETs, protection devices, Bipolar Junction Transistors, SiC devices, and ICs to our customers across many industrial and transportation applications,” said John Drabik, President TTI Americas.
“PANJIT’s vision is to power the world with our reliable and energy-efficient products, bringing people a greener and smarter future,” says Edgar Chen, COO at PANJIT. “It is a great honor to partner with TTI globally as we unite to expand the reach of our innovative discrete and IC products to a wider audience.”
TTI is committed to delivering the right part at the right time to its customers. The introduction of PANJIT products to TTI’s portfolio means designers now have access to a wider selection of semiconductor products, all available from one source, so they can find the perfect parts for their application.
PANJIT has built an enviable reputation for manufacturing reliable semiconductor components, including MOSFET, Schottky, ESD , Diodes, TVS, SiC devices, bipolar junction transistors, bridges, , Fast Recovery Diodes, and ICs, which are ideal for markets such as industrial, automotive, power management and communication & networking.
Original – PANJIT International
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PANJIT introduced new P-channel and N-channel MOSFETs designed to boost automotive electronic systems. The P-channel MOSFETs, with AEC-Q101 qualification and a high 175°C junction temperature, offer optimal choices for design engineers seeking reliability and simplified circuitry. These MOSFETs, minimizing RDS(ON) and maximizing avalanche ruggedness, are available in flexible packages (DFN3333-8L, DFN5060-8L, DFN5060B-8L, TO-252AA, TO-263, and TO-263-7L).
PANJIT’s N-channel power MOSFETs employ advanced trench technology, delivering excellent figure of merit (FOM), lower RDS(ON), and capacitance. Available in low-profile packages (DFN3333-8L, DFN5060-8L, DFN5060B-8L, TO-252AA), these MOSFETs contribute to efficient and reliable PCB layouts.
By combining innovation with reliability, PANJIT’s low voltage MOSFETs simplify power design circuitry, addressing the evolving needs of automotive design engineers.These components are a testament to PANJIT’s commitment to shaping the future of automotive electronics, offering optimal solutions for high-performance automotive applications.
Key Features of 30V & 40V Automotive-Grade P-Channel MOSFET:
• P-channel enhancement mode logic level MOSFETs
• Low RDS(ON) to minimize conduction losses
• Package with low thermal resistance
• 100% unclamped inductive switching (UIS) tested
• Electrostatic sensitive device (ESD) capable
• AEC-Q101 qualified and PPAP capable
• 175°C operating junction temperature
• Available in TO-263-7L PackageKey Features of 30V & 40V Automotive-Grade N-Channel MOSFET:
• 30V & 40V N-channel advanced trench
• Low RDS(ON) to minimize conduction losses
• Low FOM to minimize driver losses
• Standard and logic level available
• AEC-Q101 qualified and PPAP capable
• 175°C operating junction temperatureOriginal – PANJIT International
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Navitas Semiconductor invites visitors to experience “Planet Navitas” and collaborate to “Electrify Our World” at APEC 2024 (Long Beach, CA, February 26th-29th, 2024).
Since its inception in 1985, the Applied Power Electronics Conference (APEC) has become the world’s premier event in power electronics, with high-caliber, peer-reviewed technical content from industry and academia. The APEC 2016 keynote by Dan Kinzer, COO / CTO and co-founder, was the public debut for start-up Navitas and GaNFast power ICs.
Following the mission to “Electrify our World™”, the “Planet Navitas” exhibition booth invites visitors to discover how next-gen GaN and SiC technology enable the latest solutions for fully-electrified housing, transportation and industry. Examples range from TV power to home-appliance motors and compressors, EV charging, solar/micro-grid installations, and on to data center power systems. Each example highlights end-user benefits, such as increased portability, longer range, faster charging, and grid-independence, plus a focus on how low-carbon-footprint GaN and SiC technology can save over 6 Gtons/yr CO2 by 2050.
“APEC is a significant event in the power industry calendar, with an intense schedule of customer discussions on new technologies and systems,” said Mr. Kinzer. “Complementary GaNFast™ and GeneSiC™ portfolios, with comprehensive, application-specific system design support accelerates customer time-to-market with sustainable performance advantages. ‘Planet Navitas’ represents the very real, inspiring implementation of GaN & SiC across the vast $22B/year market opportunity.”
Major technology updates and releases include GaNSafe – the world’s most-protected, most-reliable and highest-performance GaN power, Gen-4 GaNSense Half-Bridge ICs – the most integrated GaN devices, Gen-3 Fast SiC power FETs – for high-power performance, and breakthrough bi-directional GaN for game-changing motor drive and energy-storage applications.
APEC 2024 will take place at the Long Beach Convention & Entertainment Center, 300 East Ocean Boulevard, Long Beach, CA 90802, with exhibition running from February 26th – 28th. “Planet Navitas” is featured at booth #1353.
Technical presentations:
- Tuesday 27th February
- “Reducing System Cost with GaN HEMTs in Motor Drive Applications”
- 8:55am, IS05.2, Alfred Hesener, Sr. Dir. Industrial & Consumer
- 10:40am, PSTT02.6, Bin Li, Dir. Applications
- 11:40am, PSTT01.9, Xiucheng Huang, Sr. Director
- 3:45pm, exhibitor presentation, location: 101B
- “Reducing System Cost with GaN HEMTs in Motor Drive Applications”
- Thursday 29th February
- “SiC & Package Innovations in Power Modules”
- 8:30am-11:20am, IS19, Stephen Oliver, Session Chair.
- 8:55am, PSTIS21.2, Tom Ribarich, Sr Dir. Strategic Marketing
- 1:30pm-3:10pm, IS27, Llew-Vaughan-Edmunds, Session Chair
- 2:20pm, IS27-3, Stephen Oliver, VP Corp Mktg & IR, and Llew Vaughan-Edmunds, Sr Dir. GeneSiC
- “SiC & Package Innovations in Power Modules”
Student Job Fair:
- From Los Angeles to Shanghai, careers at Navitas span cutting-edge IC design and innovative applications engineering to pioneering research and ensuring customer success and revenue growth. Meet the experts and join the team!
- Tuesday, February 27, 1:30pm-5pm, Regency Ballroom ABC of the Hyatt Regency hotel, right next to the Long Beach Convention Center, with Shaun Sandera, Sr. Human Resources Manager
To schedule a meeting with the Navitas team, email info@navitassemi.com, or select from the bookings calendars below:
Customer (Private Room): https://bit.ly/navitas-apec-24-customer-private-room
Customer Meeting (On-Booth): https://bit.ly/navitas-apec-24-customer-on-boothOriginal – Navitas Semiconductor
- Tuesday 27th February
