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Navitas Semiconductor announced that its high-power GaNSafe family is now available in a TOLT (Transistor Outline Leaded Top-side cooling) package.
The GaNSafe family has been specifically created to serve demanding, high-power applications, such as AI data centers, solar/energy storage, and industrial markets. Navitas 4th generation integrates control, drive, sensing, and critical protection features that enable unprecedented reliability and robustness. GaNSafe is the world’s safest GaN with short-circuit protection (350ns max latency), 2kV ESD protection on all pins, elimination of negative gate drive, and programmable slew rate control. All these features are controlled with 4-pins, allowing the package to be treated like a discrete GaN FET, requiring no VCC pin.
The TOLT packaging enhances thermal dissipation through the top side of the package, allowing heat to be dissipated directly to the heatsink (not through the PCBA). This enables the reduction of operating temperature and increases current capability, resulting in the highest level of system power density, efficiency, and reliability.
“With over 200 million units shipped and supplied with a 20-year warranty, Navitas’ highly integrated high-power GaNSafe ICs are proven to deliver performance and reliability while simplifying Design-IN for systems up to 22kW,” says Charles Bailley, Senior Director of Business Development. “As the most protected, reliable, and safe GaN devices in the industry, GaNSafe took our technology into mainstream applications above 1kW. Now, with the enhanced thermal dissipation of the TOLT package, we are enabling customers to deliver even better performance, efficiency, power density, and reliability in even the most demanding applications.”
Suitable for applications from 1 kW to 22 kW, 650 V GaNSafe in TOLT packaging is available with a range of RDS(ON)MAX from 25 to 98 mΩ. Integrated features and functions include:
- High-speed short-circuit protection, with autonomous ‘detect and protect’ with ultra-fast 350 ns / 50 ns latency.
- Protected, regulated, integrated gate-drive control, with zero gate-source loop inductance for reliable high-speed 2 MHz switching capability to maximize application power density.
- Electrostatic discharge (ESD) protection of 2 kV, compared to zero for discrete GaN transistors.
- 650 V continuous, and 800 V transient voltage capability for extraordinary application conditions.
- Integrated Miller Clamp (no negative gate bias, higher 3rd quadrant efficiency)
- Programmable turn-on and turn-off speeds (dV/dt) to simplify EMI regulatory requirements.
- Simple 4-pin device, allowing the package to be treated like a discrete GaN and requiring no additional VCC pin
- Robust, thermally enhanced packaging: ultra-low RQ_JUNC-AMB and board-level thermal cycling (BLTC) Reliability
In addition to the new ICs, Navitas will be offering reference design platforms based on GaNSafe TOLT for applications including data center power supplies and EV on-board chargers. These system platforms include complete design collateral with fully tested hardware, embedded software, schematics, bill-of-materials, layout, simulation, and hardware test results.
Original – Navitas Semiconductor
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CISSOID announced that its SiC Inverter Control Module (ICM) has been adopted by Hydro Leduc, a renowned manufacturer of hydraulic components, for its new highly efficient and modular Electric Power Take-Off (ePTO). This new ePTO solution supports the electrification of trucks and other off-road vehicles. CISSOID’s ICM not only powers and controls Hydro Leduc’s compact and efficient inverter but also contributed to greatly accelerate its development cycle.
Hydro Leduc’s new ePTO solution offers an optimized hydraulic supply to high power tools in e-trucks and other off-road vehicles that remain driven by hydraulic actuators. Hydro Leduc’s new ePTO represents a significant advancement in electric and hydraulic transmissions with their ME230, a 76 kW brushless electric motor designed to be paired with an inverter for applications up to 650Vdc.
This motor, compatible with DIN ISO14 standards and equipped with an efficient cooling system, forms a complete solution with the new series of fixed displacement spherical piston pumps: the XRe, available in 41 or 63 cm³ displacements.
Specially adapted for E-PTO mounting, the XRe series is quiet and offers remarkable efficiency, reduced pulsations due to its 9-piston design, and high speed in self-priming mode. Together, the ME230 and XRe provide high-performance and efficient electro-hydraulic solutions for a variety of applications.
CISSOID’s ICM optimally integrates a 3-Phase 1200V/340A-550A SiC Power Module, enabling efficient power conversion, a gate driver board designed for safe driving of the fast-switching SiC transistors, and a control board embedding a powerful real-time microprocessor. This hardware platform has been delivered together with the OLEA® APP INVERTER software optimized for the efficient and safe control of electric motors.
Olivier Savinois, Managing Director at EL MOTION (the sister company of Hydro Leduc, specialized in the design and manufacturing of electrical components and motors), said “We have been very pleased to work with CISSOID on the development of our new ePTO inverter. Not only did their SiC Inverter Control Module completely match our needs, we also enjoyed outstanding support from their team. Especially due to the on-site calibration of our inverter and motor, during the design and validation phases. CISSOID’s modular inverter platform ties perfectly with our scalable ePTO solution.”
Emmanuel Poli, VP Sales at CISSOID, said: “It was really exciting to work with the Hydro Leduc team, who rapidly understood how powerful it would be to leverage our ICM to accelerate the design of their inverter. We were impressed by the speed and agility of Hydro Leduc’s engineers in integrating our hardware and software solution into their motor drive.”
Original – CISSOID
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Coherent Corp. announced the launch of its 200 mm silicon carbide epitaxial wafers. Substrate and epi-wafer shipments from the company at 350 micron and 500 micron thickness are now underway.
As a dedicated manufacturer of both SiC substrates and epitaxial wafers, Coherent combines these elements to deliver exceptional quality, performance, and reliability. The new 200 mm SiC epi-wafers are engineered with cutting-edge thickness and doping uniformity, setting new industry standards and supporting the production of superior SiC power semiconductors.
“With our advanced technology, we are not only enhancing the quality of SiC devices but also addressing the growing demand for 200 mm for efficient power-conversion components in critical sectors,” said Gary Ruland, Vice President and General Manager of the SiC Materials Business Unit.
SiC devices are integral to power conversion in electric and hybrid vehicles, energy infrastructure, and high-power EV chargers. The transition from 150 mm to 200 mm diameter wafers responds to the increasing demand for SiC semiconductors, allowing manufacturers to produce more devices per wafer. This shift is expected to enhance productivity and reduce the cost of SiC devices, benefiting a wide range of applications.
By adopting larger wafers, SiC device manufacturers can achieve higher yields and improved cost efficiency because of a 1.8x increase in usable area per wafer. The implementation of state-of-the-art 200 mm tooling brings additional advantages while aligning with the industry’s drive for greater performance and reduced operational costs.
Original – Coherent
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LATEST NEWS / PRODUCT & TECHNOLOGY / SiC / WBGAxus Technology Introduced Industry’s Lowest Cost of Ownership for CMP Processes on 200mm SiC Wafers
September 26, 2024
2 Min ReadAxus Technology, a leading global provider of chemical mechanical planarization (CMP) equipment, critical for semiconductor and compound semiconductor fabrication, announced its flagship CapstoneÆ CS200 platform tools offer the industry’s lowest cost of ownership (CoO) for CMP processes on 200mm silicon carbide (SiC) wafers. Compared to its closest competitor, Axus’s small-footprint Capstone delivers twice the throughput at less than half the total cost per wafer.
Yole Group forecasts the overall SiC manufacturing tool market to top US$4.4 billion by 2029. “The unique properties of SiC require specialized manufacturing tools and lines for processing power SiC devices,” the market analyst firm noted earlier this year. Axus anticipated this need, designing the state-of-the-art Capstone from the ground up to deliver advanced processing capabilities for SiC in power electronics and other applications.
“Many 200mm fabs are looking to upgrade their installed base of CMP tools to products with leading-edge capability and functionality. Our ability to deliver industry-low CoO further underscores our strong market position and capacity to support this shift,” said Axus Technology CEO Dan Trojan. “Capstone features a streamlined workflow and integrated cleaning capability, so it requires half the process steps of older CMP tools. This allows customers to greatly lower their capex investment.”
Key Capstone CoO advantages vs. competitor
- Throughput: 2.5x wafers per hour
- Power consumption: 60% lower
- DI water consumption: 80% lower
- Footprint: 45% smaller
- Capex cost per wafer: 65% lower
- Total cost per wafer: 50% lower
Another factor contributing to Capstone’s lower CoO is its built-in Process Temperature Control (PTC) technology, which enables processing at higher pressures and speeds without exceeding temperature limits of polishing pads and other sensitive components. This feature is vital for SiC and other materials with high hardness and planarization challenges that necessitate more aggressive process conditions.
Axus built its proprietary CoO model using its own system specifications, publicly available specs for competitive tools, actual consumables costs, and real-world performance data supplied by customers. The comprehensive model factors in all CoO contributors: process variables (polish time and removal rates), polishing and cleaning consumables, power and deionized (DI) water usage, system footprint, and equipment capex including cost, utilization and wafer capacity.
Original – Axus Technology
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Toshiba Electronics Europe GmbH enhances its silicon carbide (SiC) diode portfolio with ten new 1200V Schottky barrier diodes (SBDs). The TRSxxx120Hx series, comprising five products housed in TO-247-2L packages and five in TO-247 packages, helps designers improve the efficiency of industrial equipment, including photovoltaic (PV) inverters, electric vehicle (EV) charging stations, and switching power supplies.
By implementing an enhanced junction barrier Schottky (JBS) structure, the TRSxxx120Hx series allows a very low forward voltage (VF) of just 1.27V (typ.). The merged PiN-Schottky incorporated into a JBS structure reduces diode losses under high current conditions. The TRS40N120H of the new series accepts a forward DC current (IF(DC)) of 40A (max) and a non-repetitive peak forward surge current (IFSM) of 270A (max), with the maximum case temperature (TC) of all devices being +175°C.
Combined with the lower capacitive charge and leakage current, the products help improve system efficiency and simplify thermal design. For instance, at a reverse voltage (VR) of 1200V, the TRS20H120H diode housed in the TO-247-2L package provides a total capacitive charge (QC) of 109nC and reverse current (IR) of 2µA.
Original – Toshiba
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STMicroelectronics introduced its fourth generation STPOWER silicon carbide (SiC) MOSFET technology. The Generation 4 technology brings new benchmarks in power efficiency, power density and robustness. While serving the needs of both the automotive and industrial markets, the new technology is particularly optimized for traction inverters, the key component of electric vehicle (EV) powertrains. The company plans to introduce further advanced SiC technology innovations through 2027 as a commitment to innovation.
“STMicroelectronics is committed to driving the future of electric mobility and industrial efficiency through our cutting-edge silicon carbide technology. We continue to advance SiC MOSFET technology with innovations in the device, advanced packages, and power modules,” said Marco Cassis, President, Analog, Power & Discrete, MEMS and Sensors Group. “Together with our vertically integrated manufacturing strategy, we are delivering industry leading SiC technology performance and a resilient supply chain to meet the growing needs of our customers and contribute to a more sustainable future.”
As the market leader in SiC power MOSFETs, ST is driving further innovation to exploit SiC’s higher efficiency and greater power density compared to silicon devices. This latest generation of SiC devices is conceived to benefit future EV traction inverter platforms, with further advances in size and energy-saving potential. While the EV market continues to grow, challenges remain to achieve widespread adoption and car makers are looking to deliver more affordable electric cars.
800V EV bus drive systems based on SiC have enabled faster charging and reduced EV weight, allowing car makers to produce vehicles with longer driving ranges for premium models. ST’s new SiC MOSFET devices, which will be made available in 750V and 1200V classes, will improve energy efficiency and performance of both 400V and 800V EV bus traction inverters, bringing the advantages of SiC to mid-size and compact EVs — key segments to help achieve mass market adoption.
The new generation SiC technology is also suitable for a variety of high-power industrial applications, including solar inverters, energy storage solutions and datacenters, significantly improving energy efficiency for these growing applications.
ST has completed qualification of the 750V class of the fourth generation SiC technology platform and expects to complete qualification of the 1200V class in the first quarter of 2025. Commercial availability of devices with nominal voltage ratings of 750V and 1200V will follow, allowing designers to address applications operating from standard AC-line voltages up to high-voltage EV batteries and chargers.
ST’s Generation 4 SiC MOSFETs provide higher efficiency, smaller components, reduced weight, and extended driving range compared to silicon-based solutions. These benefits are critical for achieving widespread adoption of EVs and leading EV manufacturers are engaged with ST to introduce the Generation 4 SiC technology into their vehicles, enhancing performance and energy efficiency. While the primary application is EV traction inverters, ST’s Generation 4 SiC MOSFETs are also suitable for use in high-power industrial motor drives, benefiting from the devices’ improved switching performance and robustness.
This results in more efficient and reliable motor control, reducing energy consumption and operational costs in industrial settings. In renewable energy applications, the Generation 4 SiC MOSFETs enhance the efficiency of solar inverters and energy storage systems, contributing to more sustainable and cost-effective energy solutions. Additionally, these SiC MOSFETs can be utilized in power supply units for server datacenters for AI, where their high efficiency and compact size are crucial for the significant power demands and thermal management challenges.
To accelerate the development of SiC power devices through its vertically integrated manufacturing strategy, ST is developing multiple SiC technology innovations in parallel to advance power device technologies over the next three years. The fifth generation of ST SiC power devices will feature an innovative high-power density technology based on planar structure. ST is at the same time developing a radical innovation that promises outstanding on-resistance RDS(on) value at high temperatures and further RDS(on) reduction, compared to existing SiC technologies.
ST will attend ICSCRM 2024, the annual scientific and industry conference exploring the newest achievements in SiC and other wide bandgap semiconductors. The event, from September 29 to October 04, 2024, in Raleigh, North Carolina will include ST technical presentations and an industrial keynote on ‘High volume industrial environment for leading edge technologies in SiC’.
Original – STMicroelectronics
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Resonac Corporation (formerly Showa Denko K.K.) and Soitec have signed an agreement to develop 200mm (8-inch) SmartSiC™ silicon carbide (SiC) wafers using Resonac substrates and epitaxy processes, in a major step for the deployment of Soitec’s high-yielding silicon carbide technology in Japan and other international markets.
SmartSiC™ silicon carbide is a disruptive compound semiconductor material providing superior performance and efficiency over silicon in high-growth power applications for electric mobility and industrial processes. It allows for more efficient power conversion, lighter and more compact designs and overall system cost savings – all key factors for success in automotive and industrial systems.
Christophe Maleville, Chief Technology Officer at Soitec, commented: “Silicon carbide is beingadopted for EV and industrial applications, where it brings a significant system cost advantage. To further accelerate this adoption, silicon carbide yield and productivity must be improved. Associating Resonac premium quality SiC materials with Soitec’s unique 200mm (8-inch) SmartSiC™ technology will support volume availability of record quality epi-ready substrate. The combination of our respective technologies and products will optimize these substrates using Resonac’s high-quality epitaxy. Soitec is proud and excited to be partnering with Resonac to develop a best-in-class combined SiC product offering for Japan and the world.”
Makoto Takeda, General Manager of Device Solutions Business Unit at Resonac, commented: “We are delighted to announce this partnership with Soitec, which is fully aligned with our broader commitment to sustainable and energy-efficient semiconductor solutions. By combining Resonac’s high quality monocrystalline silicon carbide wafers with Soitec’s unique SmartSiC™ technology, we will deliver improved production efficiency of 200mm (8-inch) silicon carbide wafers and diversify the epi-wafer supply chain.”
Soitec’s SmartSiC™ silicon carbide wafers, or engineered substrates, are produced using the company’s proprietary SmartCut™ technology to bond an ultra-fine layer of high-quality monoSiC ‘donor’ wafer to a low-resistivity polycrystalline (poly-SiC) ‘handle’ wafer. The resulting engineered substrate delivers significantly improved device performance and manufacturing yields. By allowing multiple re-uses of the prime quality mono-SiC wafer, the process also reduces overall energy consumption during wafer manufacturing.
Soitec has a new fabrication plant at its headquarters in Bernin, France, primarily dedicated to the production of SmartSiC™ wafers for electric vehicles, renewable energy and industrial equipment component applications.
Original – Soitec
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Infineon Technologies AG announced that the company has succeeded in developing the world’s first 300 mm power gallium nitride (GaN) wafer technology. Infineon is the first company in the world to master this groundbreaking technology in an existing and scalable high-volume manufacturing environment. The breakthrough will help substantially drive the market for GaN-based power semiconductors.
Chip production on 300 mm wafers is technologically more advanced and significantly more efficient compared to 200 mm wafers, since the bigger wafer diameter fits 2.3 times as many chips per wafer.
GaN-based power semiconductors find fast adoption in industrial, automotive, and consumer, computing & communication applications, including power supplies for AI systems, solar inverters, chargers and adapters, and motor-control systems. State-of-the art GaN manufacturing processes lead to improved device performance resulting in benefits in end customers’ applications as it enables efficiency performance, smaller size, lighter weight, and lower overall cost. Furthermore, 300 mm manufacturing ensures superior customer supply stability through scalability.
“This remarkable success is the result of our innovative strength and the dedicated work of our global team to demonstrate our position as the innovation leader in GaN and power systems,” said Jochen Hanebeck, CEO of Infineon Technologies AG. “The technological breakthrough will be an industry game-changer and enable us to unlock the full potential of gallium nitride. Nearly one year after the acquisition of GaN Systems, we are demonstrating again that we are determined to be a leader in the fast-growing GaN market. As a leader in power systems, Infineon is mastering all three relevant materials: silicon, silicon carbide and gallium nitride.”
Infineon has succeeded in manufacturing 300 mm GaN wafers on an integrated pilot line in existing 300 mm silicon production in its power fab in Villach (Austria). The company is leveraging well-established competence in the existing production of 300 mm silicon and 200 mm GaN. Infineon will further scale GaN capacity aligned with market needs. 300 mm GaN manufacturing will put Infineon in a position to shape the growing GaN market which is estimated to reach several billion US-Dollars by the end of the decade.
This pioneering technological success underlines Infineon’s position as a global semiconductor leader in power systems and IoT. Infineon is implementing 300 mm GaN to strengthen existing and enabling new solutions and application fields with an increasingly cost-effective value proposition and the ability to address the full range of customer systems. Infineon will present the first 300 mm GaN wafers to the public at the electronica trade show in November 2024 in Munich.
A significant advantage of 300 mm GaN technology is that it can utilize existing 300 mm silicon manufacturing equipment, since gallium nitride and silicon are very similar in manufacturing processes. Infineon’s existing high-volume silicon 300 mm production lines are ideal to pilot reliable GaN technology, allowing accelerated implementation and efficient use of capital. Fully scaled 300 mm GaN production will contribute to GaN cost parity with silicon on R DS(on) level, which means cost parity for comparable Si and GaN products.
300 mm GaN is another milestone in Infineon’s strategic innovation leadership and supports Infineon’s mission of decarbonization and digitalization.
Original – Infineon Technologies
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Infineon Technologies AG has been nominated for the Deutscher Zukunftspreis 2024, the Federal President’s Award for Technology and Innovation, for its development of a new type of energy-saving chip based on the innovative semiconductor material silicon carbide (SiC). The Jury of Deutscher Zukunftspreis has announced the three nominated teams in Munich.
A team of developers from Infineon, together with Chemnitz University of Technology, has succeeded in developing the world’s first silicon carbide MOSFET with a vertical channel (trench MOSFET) and innovative copper contacting in the 3300V voltage class. The new SiC modules and the power converters equipped with the modules represent a revolutionary innovation leap in semiconductor technology from conventional silicon to more energy-efficient silicon carbide, which reduces switching losses in high-current applications by 90%.
MOSFETs are electrical switches for a wide range of applications. Trench MOSFETs differ from so-called planar MOSFETs in their cell structure and performance. While the current flow in planar MOSFETs is initially horizontal, trench MOSFETs offer purely vertical channels. This results in a higher cell density per surface area, which in turn significantly reduces the losses in the chip during energy conversion and therefore increases efficiency.
“The transition towards green energy and many other pressing challenges of our time can only be solved with technological progress,” said Jochen Hanebeck, CEO of Infineon Technologies AG. “It is therefore important to promote and reward innovation and make it visible in society. The ‘Deutscher Zukunftspreis’ is the most important national award that is presented with this aim in mind. The nomination is a great honor for us and proof of the successful research and development work at Infineon. Congratulations to all colleagues involved!”
The CoolSiC™ XHP™2 module family enables significant energy savings, for example in industrial power generation in solar parks or wind turbines, in power transmission and, above all, in end consumption, where high energies in the megawatt range are required. A single train with a silicon carbide drive system can save around 300 MWh per year compared to the previous silicon-based solution. This is roughly equivalent to the annual consumption of 100 single-family homes. Together with drive technology manufacturers and rail operators, Infineon is making an important contribution to decarbonization. At the same time, local residents also benefit from the lower noise level of trains with SiC modules when they pass through residential areas.
Through numerous innovative developments in chip processing and design as well as contacting and module technology, the team led by Dr. Konrad Schraml, Dr. Caspar Leendertz (both Infineon) and Prof. Dr. Thomas Basler (Chemnitz University of Technology) has brought the 3300V CoolSiC XHP2 high-performance module to production readiness. With ten times greater reliability against thermomechanical stress and a significantly higher power density compared to silicon modules, the new silicon carbide module can also be used to electrify large drives in diesel locomotives, agricultural and construction machinery, aircraft and ships, which were previously reserved for fossil fuels. The significantly higher switching frequencies permitted by the new module are helpful, as they enable a significant reduction in weight and volume of the power converters in the application.
“This nomination shows that climate change and sustainable resource consumption have become central aspects of our society,” said Dr. Peter Wawer, Division President Green Industrial Power (GIP) at Infineon. “Innovative energy solutions and power semiconductors are a core component in decarbonization and fighting climate change, as the expert jury of Deutscher Zukunftspreis has recognized. I am proud that we at Infineon can make a significant contribution to a green future with pioneering technology.”
Project manager Dr. Konrad Schraml: “For us as a development team, it is a matter close to our hearts to develop innovative chips that contribute to efficient energy consumption and thus also to green mobility on our planet. This nomination is a great recognition for my team, whose tireless efforts, expertise and passion for sustainability have made the technology breakthrough in silicon carbide possible.”
On November 27, Federal President Frank-Walter Steinmeier presents the Deutscher Zukunftspreis to the winning team in Berlin.
Original – Infineon Technologies
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JEDEC Solid State Technology Association announced the publication of JEP200: Test Methods for Switching Energy Loss Associated with Output Capacitance Hysteresis in Semiconductor Power Devices. Developed jointly by JEDEC’s JC-70.1 Gallium Nitride and JC-70.2 Silicon Carbide Subcommittees, JEP200 is available for free download from the JEDEC website.
Proliferation of soft switching power conversion topologies brought about the need to accurately quantify the energy stored in a power device’s output capacitance because the energy impacts efficiency of power converters. JEP200, developed in collaboration with academia, addresses the critical power supply industry need to properly test and measure the switching energy loss due to the output capacitance hysteresis in semiconductor power devices and details tests circuits, measurement methods, and data extraction algorithms. The document applies not only to wide bandgap power semiconductors such as GaN and SiC, but also silicon power transistors and diodes.
“Professionals in high-frequency power conversion systems have long sought a standardized approach to testing new switching energy losses,” said Dr. Jaume Roig, Member of Technical Staff, onsemi and Vice Chair of the JC-70 Committee. “This document now provides helpful guidance on testing energy losses related to output capacitance hysteresis caused by displacement currents. With this clarity, system optimization can proceed more accurately.”
“JEDEC’s JC-70 committee has the expertise necessary to meet the demands of the entire power semiconductor industry, and the development of JEP200 demonstrates how the JEDEC process enabled the committee to swiftly respond to an industry need,” said John Kelly, JEDEC President. “JEP200 encompasses GaN, SiC, and Si power devices, helping the industry navigate design challenges caused by the growing number of new power conversion topologies.”
Original – JEDEC
