WBG Tag Archive

  • Infineon Technologies Adds 750V G1 Discrete MOSFET to CoolSiC™ Family

    Infineon Technologies Adds 750V G1 Discrete MOSFET to CoolSiC™ Family

    2 Min Read

    Infineon Technologies AG introduced the 750V G1 discrete CoolSiC™ MOSFET to meet the increasing demand for higher efficiency and power density in industrial and automotive power applications. The product family includes both industrial-graded and automotive-graded SiC MOSFETs that are optimized for totem-pole PFC, T-type, LLC/CLLC, dual active bridge (DAB), HERIC, buck/boost, and phase-shifted full bridge (PSFB) topologies.

    The MOSFETs are ideal for use in both typical industrial applications, such as electric vehicle charging, industrial drives, solar and energy storage systems, solid state circuit breaker, UPS systems, servers/ datacenters, telecom, and in the automotive sector, such as onboard chargers (OBC), DC-DC converters, and many more.

    The CoolSiC MOSFET 750 V G1 technology features excellent RDS (on) x Q fr and superior  RDS (on) x Q oss Figure-of-Merits (FOMs), resulting in ultra-high efficiency in hard-switching and soft-switching topologies respectively. Its unique combination of high threshold voltage (V GS(th), Typ. of 4.3 V) with low Q GD/Q GS ratio ensures high robustness against parasitic turn-on and enables unipolar gate driving, leading to increased power density and low cost of the systems.

    All devices use Infineon’s proprietary die-attach technology which delivers outstanding thermal impedance for equivalent die sizes. The highly reliable gate oxide design combined with Infineon’s qualification standards delivers robust and long-term performance.

    With a granular portfolio ranging from 8 to 140 mΩ RDS (on) at 25°C, this new CoolSiC MOSFET 750 V G1 product family meets a wide range of needs. Its design ensures lower conduction and switching losses, boosting overall system efficiency.

    Its innovative packages minimize thermal resistance, facilitate improved heat dissipation, and optimize in-circuit power loop inductance, thereby resulting in high power density and reduced system costs. It’s important to note that this product family features the cutting-edge QDPAK top-side cooled package.

    Original – Infineon Technologies

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  • EPC Introduced 1 mOhm GaN FET

    EPC Introduced 1 mOhm GaN FET

    1 Min Read

    EPC introduced the 100 V, 1 mOhm EPC2361. This is the lowest on-resistance GaN FET on the market offering double the power density compared to EPC’s prior-generation products.

    The EPC2361 has a typical RDS(on) of just 1 mOhm in a thermally enhanced QFN package with exposed top and tiny, 3 mm x 5 mm, footprint. The maximum RDS(on) x Area of the EPC2361 is 15 mΩ*mm2 – over five times smaller than comparable 100 V silicon MOSFETs.

    With its ultra-low on-resistance, the EPC2361 enables higher power density and efficiency in power conversion systems, leading to reduced energy consumption and heat dissipation. This breakthrough is particularly significant for applications such as high-power PSU AC-DC synchronous rectification, high frequency DC-DC conversion for data centers, motor drives for eMobility, robotics, drones, and solar MPPTs. 

    “Our new 1 mΩ GaN FET continues to push the boundaries of what is possible with GaN technology, empowering our customers to create more efficient, compact, and reliable power electronics systems,” comments Alex Lidow, EPC CEO and co-founder.

    Original – Efficient Power Conversion

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  • Arrow Electronics and Infineon Technologies Deliver 30kW DC Fast Charger Reference Platform

    Arrow Electronics and Infineon Technologies Deliver 30kW DC Fast Charger Reference Platform

    2 Min Read

    Arrow Electronics, Inc. and its engineering services company, eInfochips, are working with Infineon Technologies AG to help eInfochips’ customers accelerate the development of electric vehicle (EV) chargers.

    Development of EV chargers, especially DC “fast chargers,” is becoming increasingly challenging to equipment manufacturers due to several factors, such as lack of prior experience, stringent functional safety and reliability requirements, and a fledgling support network. The collaboration between Arrow and Infineon aims to help innovators navigate these challenges while accelerating time-to-market.

    As part of the collaboration, Arrow’s High Power Center of Excellence has developed a 30kW DC fast charger reference platform. This includes Infineon’s 1200V CoolSiC™ Easy power modules and also hardware design, embedded firmware, bi-directional charging support and energy metering functionality.

    “Combining Arrow’s strength in components, engineering and design services with Infineon’s innovative products will help customers accelerate their design and speed to market in e-mobility applications,” said Murdoch Fitzgerald, vice president, global engineering and design services at Arrow. “Customers can rely on this collaboration to deliver innovative and leading edge DC faster chargers, accelerate and de-risk design cycles, and get access to a world-class support team enabling them to plan and manage their product roadmap and lifecycles.”

    “Infineon is on a drive towards decarbonization and digitalization with our ecosystem partners, and this collaboration with Arrow is a testament to this mission,” said Shri Joshi, vice president of Green Industrial Power, Infineon Technologies Americas. “The joint 30kW DC fast charger reference platform, which includes Infineon’s latest power modules and devices, will help our customers bring more fast chargers to market as the future moves to electrical vehicles. We look forward to this ongoing collaboration to support our customer base.”

    The first reference design from this collaboration, a production-grade 30kW DC fast charger reference development platform, is being demonstrated at Applied Power Electronics Conference, Feb. 25-29, in Long Beach, Calif.

    Original – Arrow Electronics

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  • Vishay Intertechnology Brings Industry-Leading SiC MOSFET Technology to APEC 2024

    Vishay Intertechnology Brings Industry-Leading SiC MOSFET Technology to APEC 2024

    3 Min Read

    Vishay Intertechnology, Inc. announced that at the Applied Power Electronics Conference and Exposition (APEC) 2024, the company is showcasing its broad portfolio of passive and semiconductor solutions that address the latest trends in power electronics — from energy harvesting, electric vehicle (EV) powertrains, and mass commercialization to efficient and effective power electronics for power tools and switching regulators that shorten the iterative design cycle.

    Taking center stage in booth 1607 will be Vishay’s newly released 1200 V MaxSiC™ series silicon carbide (SiC) MOSFETs, which deliver on-resistances of 40, 80 and 250 mΩ in standard packages for industrial applications, with custom products also available. In addition, Vishay will provide a roadmap for 650 V to 1700 V SiC MOSFETs with on-resistances ranging from 12 mΩ to 1 Ω.

    Vishay’s SiC platform is based on a proprietary MOSFET technology — enabled through the company’s recent acquisition of MaxPower Semiconductor, Inc. — which will address market demands in traction inverter, photovoltaic energy storage, on-board charger, and charging station applications. At the booth, Vishay’s experts will also be discussing upcoming planned releases of the MaxSiC platform, including AEC-Q101 Automotive Grade products.

    At APEC 2024, Vishay will also be offering a variety of product-focused demonstrations highlighting IHPT haptic actuators; the THJP ThermaWick® Thermal Jumper; the pulse performance of MELF, CRCW / CRCW-HP thick film, and MCS, MCU, and MCW thin film chip resistors; and the thermal capabilities of the PCAN and RCP high power thin and thick film resistors. In addition, application-focused demonstrations will include:

    • An 800 V SiC MOSFET heat pump with a 100 % Vishay BOM
    • A high voltage intelligent battery shunt for 400 V and 800 V batteries
    • A six-phase DC/DC converter for mild hybrid vehicles with 48 V boardnets that provides power to 12 V loads up to 3 kW with high efficiency to 97 %
    • A semiconductor-based, resettable eFuse for 800 V electric vehicle systems

    Additional Vishay passive components on display at APEC 2024 will include the IHDM series of high current, edge-wound through hole inductors with continuous operation to +180 °C; hybrid planar and integrated transformers; wireless charging coils; NTC thermistors and PTC thermistors, including the PTCEL series capable of handling energy absorption up to 240 J; high power wirewound, thin film, and thick film resistors, including the anti-surge RCS with power to 0.5 W in the 0805 case size; high voltage thick film resistors and dividers; high voltage aluminum, ceramic, and power electronic capacitors (PEC); high energy tantalum capacitors; and robust metallized polypropylene film capacitors, including the MKP1848e DC-Link capacitor with high temperature operation to +125 °C.

    Highlighted Vishay semiconductor solutions will consist of the SiC967 high voltage synchronous buck regulator with integrated power MOSFETs and inductors; 400 V, 600 V, and 1200 V standard rectifiers in SlimDPAK 2L and SMPD 2L packages with high creepage distance; 650 V and 1200 V SiC Schottky diodes up to 12 A in eSMP® series and power packages for AC/DC power factor correction (PFC) and ultra high frequency output rectification; and transient voltage suppressors (TVS).

    Original – Vishay Intertechnology

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  • CISSOID Released New Series of SiC Inverter Control Modules

    CISSOID Released New Series of SiC Inverter Control Modules

    2 Min Read

    At the Applied Power Electronics Conference (APEC), CISSOID released its new series of SiC Inverter Control Modules (ICMs) dedicated to the E-mobility market. These software-powered SiC Inverter Control Modules are designed to help engineers create functionally safe, robust and modular E-motor drives while dramatically shortening time-to-market.

    The new CXT-ICM3SA series offers optimal hardware and software integration of CISSOID’s existing line of 3-phase 1200V/340A-550A SiC MOSFET Intelligent Power Modules (IPMs) with an OLEA® T222 Field Programmable Control Unit (FPCU) control board and OLEA® APP INVERTER application software, supplied in partnership with Silicon Mobility. Depending on the selected ICM product, this modular core engine is capable of powering and controlling high voltage SiC traction inverters with battery voltages up to 850V, at output power exceeding 350kW, and with peak efficiency above 99%.
      
    This unique integration facilitates the rapid development of SiC inverters by solving head-scratching EMC issues often generated due to fast-switching SiC transistors, by supporting different modulation schemes, e.g. SVPWM or DPWM, combined with dead time compensation, and by offering advanced motor control algorithms, including Field Oriented Control (FOC) and Flux Weakening management.
     
    CISSOID further improves time-to-market by providing a complete SiC inverter reference design allowing motor bench testing of the ICM together with key peripheral elements such as current sensors, a high-performance DC-Link capacitor and EMI filter. Both the ICM and the reference design can be obtained from CISSOID, together with the motor control software and on-site technical support.

    Delivering leadership performance, the ICM supports the drive of high-speed motors, with no compromise on efficiency, thanks to the combination of CISSOID’s low losses SiC power module with the ultra-fast real-time FPCU, enabling high switching frequencies up to 50kHz. Furthermore, this application-specific processor dedicated to e-motor control, with onboard programmable hardware, accelerates the response time to critical events, off-loading the processor cores and enhancing functional safety. Both the FPCU and the control software are ISO-26262 ASIL C/D certified and AUTOSAR 4.3 compliant.

    Original – CISSOID

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  • Navitas Semiconductor Powers Samsung’s 25 W Super-Fast Charging for AI-enhanced Galaxy S24

    Navitas Semiconductor Powers Samsung’s 25 W Super-Fast Charging for AI-enhanced Galaxy S24

    2 Min Read

    Navitas Semiconductor announced that its GaNFast™ power ICs drive Samsung’s 25 W “Super-Fast Charging” (SFC) for the new, AI-enhanced Galaxy S24 smartphone.

    Flagship hardware specifications include a 2340 x 1080 (FHD+) dynamic AMOLED 2X, and 120 Hz screen, plus the Galaxy S24 delivers innovative and practical AI features to help transform the way users communicate, create and discover the world. Galaxy AI features like Live Translate, Chat Assist and new “Circle to Search” with Google, to improve nearly every experience that S24 users can enjoy.

    The 25 W GaNFast unit delivers 50% charge to the high-capacity 4000 mAh battery in only 30 minutes, while the USB PD 3.0 (Type-C) specification makes it compatible with other Samsung products including Galaxy Buds2 audio, Galaxy Z Fold5, Galaxy Flip and Galaxy A23.

    Designed with sustainability in mind, the 25 W power adapter features a 75% reduction in power consumption sleep mode. Navitas’ GaNFast technology is deployed in a high-frequency, quasi-resonant (HFQR) topology running at 150 kHz – 3x faster than standard silicon designs – and delivers a 30% size shrink vs. conventional charger designs.

    “We are excited to extend our relationship with Samsung as they continue to develop groundbreaking mobile phone technology,” said David Carroll, Sr. VP Worldwide Sales for Navitas. “Deploying GaNFast ICs has allowed Samsung to create an ultra-compact, lightweight and efficient 25W adapter that can rapidly re-charge the new Galaxy S24 and a variety of other phones and accessories in the Samsung range.”

    Original – Navitas Semiconductor

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  • Innoscience Technology to Showcase New Products at APEC 2024

    Innoscience Technology to Showcase New Products at APEC 2024

    3 Min Read

    Innoscience Technology will demonstrate industry-leadership at the upcoming IEEE Applied Power Electronics Conference and Exposition (APEC) 2024

    At the industrial session, Innoscience will address the exponential demand in power by datacenters due to the processing power necessitated by Artificial Intelligence (AI) applications. The paper will show that with Innoscience’s 650V InnoGaN, it is possible to make a 2kW AC/DC conversion PSU with a high power density and a peak efficiency above 96%, thereby meeting the recent stringent 80 Plus titanium efficiency rating.

    Thanks to the absence of a body diode on GaN devices, a simple Totem pole PFC architecture can be implemented while still reaching high levels of efficiency. At the booth Innoscience will also showcase a 4.2kW AC/DC conversion PSU meeting 80 Plus titanium efficiency rating within a power density of 130W/in3

    Moreover, to address the 48V to 12V DC-DC power conversion inside the data center, Innoscience will present an all GaN HEMTs based 1kW 48V-12V unregulated LLC solution that features GaN power devices both at the primary side (100V devices) as well as at the secondary side (40V devices). In order to maximize the power density and simplify the circuit, the solution uses Innoscience’s recent integrated SolidGaN solution (ISG3201), which integrates an half-bridge (made by two 100V/3.2mOhm InnoGaN devices) with its driver, protection etc.. in one package. The final all GaN 1kW 48V-12 converter has a size of only 50mmx30mmx9mm, which is 70% smaller than a Silicon counterpart rated only 600W. The converter achieves a peak efficiency of 98.5%. 

    Dr. Denis Marcon, General Manager Innoscience Europe, comments: “Reliability is also an important consideration for data centers, because they operate 24/7 and they must guarantee continuity of service. Therefore, in this paper we will also present strong reliability data of Innoscience’s HV and LV GaN power devices, including end-of-life testing for life-time calculation which shows reliability data at the parts-per-billion level.” 

    Yi Sun, General Manager Innoscience America comments: “Innoscience today has one of the widest portfolio of GaN power device solutions covering 30V to 700V applications, a family of  GaN discrete available in standard packages (e.g. QFN, FCQFN, TO252 etc..) as well as integrated GaN IC solutions that include in one chip the GaN FET, the driver, protections etc.” 

    Visitors to the Innoscience booth at APEC will also see new products, such as the NV100FQ030A, a 100V bidirectional IC that can be employed to deliver high efficiency in applications including battery management systems, high-side load switching in bidirectional converters, and various switching circuits in power systems.

    Yi Sun, adds: “Innoscience is leading the GaN industry with many new products that are industry firsts. That is why our devices are finding applications in all markets, from consumer chargers through industrial and communications and into the automotive sector. Join us at booth 1543 to find out more.”

    Innoscience presentations:

    •  IS02.7 – Industry Session / Tuesday Feb 27th ,11:30-11:55am “Ultra-High Frequency (10MHz) Buck Converter with GaN HEMT for Mobile Phone Application” given by Dr Pengju Kong
    •  IS11.1 – Industry Session / Wednesday Feb 28th, 8:30-8:55am “Efficient and compact power conversions made possible with GaN technology” given by Dr Pengju Kong.

    Original – Innoscience Technology

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  • Microchip Technology Introduced 3.3 kV XIFM Plug-and-Play mSiC™ Gate Driver with Augmented Switching™ Technology

    Microchip Technology Introduced 3.3 kV XIFM Plug-and-Play mSiC™ Gate Driver with Augmented Switching™ Technology

    2 Min Read

    The electrification of everything is driving the widespread adoption of Silicon Carbide (SiC) technology in medium-to-high-voltage applications like transportation, electric grids and heavy-duty vehicles. To help developers implement SiC solutions and fast-track the development process, Microchip Technology introduced the 3.3 kV XIFM plug-and-play mSiC™ gate driver with patented Augmented Switching™ technology, which is designed to work out-of-the-box with preconfigured module settings to significantly reduce design and evaluation time.

    To speed time to market, the complex development work of designing, testing and qualifying a gate driver circuit design is already completed with this plug-and-play solution. The XIFM digital gate driver is a compact solution that features digital control, an integrated power supply and a robust fiber-optic interface that improves noise immunity. This gate driver has preconfigured “turn-on/off” gate drive profiles that are tailored to optimize module performance.

    It incorporates 10.2 kV primary-to-secondary reinforced isolation with built-in monitoring and protection functions including temperature and DC link monitoring, Undervoltage Lockout (UVLO), Overvoltage Lockout (OVLO), short-circuit/overcurrent protection (DESAT) and Negative Temperature Coefficient (NTC). This gate driver also complies with EN 50155, a key specification for railway applications.

    “As the silicon carbide market continues to grow and push the boundaries of higher voltage, Microchip makes it easier for power system developers to adopt wide-bandgap technology with turnkey solutions like our 3.3 kV plug-and-play mSiC gate driver,” said Clayton Pillion, vice president of Microchip’s silicon carbide business unit. “By having the gate drive circuitry preconfigured, this solution can reduce design cycle time by up to 50% compared to a traditional analog solution.”

    With over 20 years of experience in the development, design, manufacturing and support of SiC devices and power solutions, Microchip helps customers adopt SiC with ease, speed and confidence. Microchip’s mSiC™ products include SiC MOSFETS, diodes and gate drivers with standard, modified and custom options.

    Original – Microchip Technology

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  • Texas Instruments Expands Power Portfolio

    Texas Instruments Expands Power Portfolio

    4 Min Read

    Texas Instruments introduced two new power conversion device portfolios to help engineers achieve more power in smaller spaces, providing the highest power density at a lower cost. TI’s new 100V integrated gallium nitride (GaN) power stages feature thermally enhanced dual-side cooled package technology to simplify thermal designs and achieve the highest power density in mid-voltage applications at more than 1.5kW/in3.

    TI’s new 1.5W isolated DC/DC modules with integrated transformers are the industry’s smallest and most power-dense, helping engineers shrink the isolated bias power-supply size in automotive and industrial systems by over 89%. Devices from both portfolios will be on display at this year’s Applied Power Electronics Conference (APEC), Feb. 25-29 in Long Beach, California.

    “For power-supply designers, delivering more power in limited spaces will always be a critical design challenge,” said Kannan Soundarapandian, general manager of High Voltage Power at TI. “Take data centers, for example – if engineers can design power-dense server power-supply solutions, data centers can operate more efficiently to meet growing processing needs while also minimizing their environmental footprint. We’re excited to continue to push the limits of power management by offering innovations that help engineers deliver the highest power density, efficiency and thermal performance.”

    Increase power density and efficiency with 100V integrated GaN power stages


    With TI’s new 100V GaN power stages, LMG2100R044 and LMG3100R017, designers can reduce power-supply solution size for mid-voltage applications by more than 40% and achieve industry-leading power density of over 1.5kW/in3, enabled by GaN technology’s higher switching frequencies. The new portfolio also reduces switching power losses by 50% compared to silicon-based solutions, while achieving 98% or higher system efficiency given the lower output capacitance and lower gate-drive losses. In a solar inverter system, for example, higher density and efficiency enables the same panel to store and produce more power while decreasing the size of the overall microinverter system.

    A key enabler of the thermal performance in the 100V GaN portfolio is TI’s thermally enhanced dual-side cooled package. This technology enables more efficient heat removal from both sides of the device and offers improved thermal resistance compared to competing integrated GaN devices.

    To learn more about the benefits of TI’s 100V GaN power stages for mid-voltage applications, read the technical article, “4 mid-voltage applications where GaN will transform electronic designs.”

    Shrink bias power supplies by more than 89%


    With over eight times higher power density than discrete solutions and three times higher power density than competing modules, TI’s new 1.5W isolated DC/DC modules deliver the highest output power and isolation capability (3kV) for automotive and industrial systems in a 4mm-by-5mm very thin small outline no-lead (VSON) package. With TI’s UCC33420-Q1 and UCC33420, designers can also easily meet stringent electromagnetic interference (EMI) requirements, such as Comité International Spécial des Perturbations Radioélectriques (CISPR) 32 and 25, with fewer components and a simple filter design.

    The new modules use TI’s next-generation integrated transformer technology, which eliminates the need for an external transformer in a bias supply design. The technology allows engineers to shrink solution size by more than 89% and reduce height by up to 75%, while cutting bill of materials by half compared to discrete solutions.

    With the first automotive-qualified solution in this small package, designers can now reduce the footprint, weight and height of their bias supply solution for electric vehicle systems such as battery management systems. For space-constrained industrial power delivery in data centers, the new module enables designers to minimize printed circuit board area.

    To learn more about the benefits of TI’s 1.5W isolated DC/DC modules, read the technical article, “How a new isolated DC/DC module can help solve power-density challenges.”

    Pushing the limits of power at APEC 2024


    These new devices are the latest ways TI is pushing power further and making innovation possible for engineers everywhere. At APEC 2024, TI will showcase the latest automotive and industrial designs for 48V automotive power; the first USB Power Delivery Extended Power Range full charging solution on the market; an 800V, 300kW silicon carbide-based traction inverter; high-efficiency power for server motherboards; and more.

    • Saturday, Feb. 24-Thursday, Feb. 29: Visit TI in the Long Beach Convention & Entertainment Center, Booth No. 1145. See TI.com/APEC for more information.
    • Wednesday, Feb. 28 at 12 p.m. Pacific time: TI General Manager of Industrial Power Design Services Robert Taylor will present an industry session, “To Power Density and Beyond: Breaking Through Barriers to Achieve the Highest Power Density.” He will discuss innovations in packaging, integration and system-level techniques that are making greater power density possible.
    • Throughout APEC: TI power experts will lead 20 industry and technical sessions to address power-management design challenges. The full schedule of TI experts’ industry and technical sessions is available at TI.com/APEC.

    Original – Texas Instruments

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  • Guideline for Reproducible SiC MOSFET Thermal Characterization Based on Source-Drain Voltage

    Guideline for Reproducible SiC MOSFET Thermal Characterization Based on Source-Drain Voltage

    18 Min Read

    Abstract

    This paper aims to provide a guideline with respect to a reproducible thermal transient measurement for SiC MOSFETs. Although the thermal transient measurement based on sourcedrain voltage is a widely applied method for characterizing the thermal properties of MOSFETs, the approach developed for silicon-based devices may not be directly applicable to SiC devices. Therefore, this paper investigates the thermal transient measurement method for SiC MOSFETs using the source-drain voltage as the temperature-sensitive electrical parameter.

    A comprehensive investigation of its linearity, sensitivity, and stability toward yielding the thermal structure-property of the device has been carried out. The investigation includes two primary characterization procedures: temperature calibration and cooling curve measurement. The associated key testing conditions, such as gate voltages, sensing and heating currents, etc., are covered. The study examines the impact of these conditions on both static and dynamic performance to provide a better understanding of the reproducible thermal transient measurement for SiC MOSFETs.

    I. Introduction

    Silicon carbide (SiC) MOSFETs are becoming increasingly popular in a wide range of applications, such as electric vehicles, industrial drives, and high-voltage transmissions. SiC offers several advantages over silicon, including lower power losses at higher switching frequencies, higher operating temperatures, and withstanding higher voltages. However, to ensure safe operation and maximize the device’s lifetime, all these superior performances must be achieved within the maximum junction temperature limit. Therefore, thermal characterization of SiC MOSFETs is essential to define the boundaries.

    Thermal transient measurement is a widely accepted method to characterize the thermal properties of silicon (Si) power semiconductor devices. It has been recognized in several standards, such as JEDEC JESD 51-1 and JEDEC 51-14 and successfully applied to different applications over the past two decades, such as generating RC thermal models for electro-thermal simulation, packaging defect inspection, and junction-to-case thermal resistance measurement.

    However, directly applying this approach to SiC MOSFETs is still doubtful to some extent. For instance, SiC MOSFETs do not have a pn junction in the forward direction and have low on-state resistance, which imposes challenges to measure transient thermal response by the channel voltage. Meanwhile, trapped charge carriers in the gate region may cause second-level electrical disturbances and inevitably affect the extraction of thermal transient from the coupled electrical disturbance. In the state-of-the-art, the source-drain voltage is one of the most used temperature sensitivity electrical parameters (TSEP) for SiC MOSFETs.

    As shown in Fig. 1, the characterization consists of two major procedures, namely temperature calibration and cooling curve measurement. Improper selection of test conditions may result in misleading results. First, calibrating SiC MOSFETs for thermal transient measurement involves selecting the appropriate sensing current and gate voltage as step 1 shown in Fig. 1. While a sensing current of 1/1000 of the nominal current is commonly used for Si devices, it is however still under debate for SiC MOSFETs. Some studies use a small current below 1/1000 of the nominal current, while others suggest a much higher sensing current.

    Fig. 1. Circuit diagram of the thermal transient measurement for SiC MOSFETs

    Additionally, selecting the appropriate negative gate voltage is critical for fully turning off the MOSFET channel and allowing all injected sensing current to flow through the body diode. However, the methodology for selecting the optimal gate voltage value and its impact on the transient thermal impedance remains unclear. It is worth noting that previous studies have mainly focused on steady-state calibration results, but transient temperature measurement requires consideration of transient behaviors, which has not been fully addressed in the literature. In addition to the calibration procedure, the cooling curve measurement of SiC MOSFETs involves other parameters such as heating currents and the switching transient of the gate state.

    Previous studies have mainly focused on power cycling, where only the maximum and minimum temperature points are required. However, the investigation of thermal transient measurement with respect to the temperature dynamics across multiple time scales is limited. Electrical disturbances that occur at any point in time may lead to inaccurate thermal structure properties. Therefore, further investigation of the cooling curve measurement is also crucial. This paper comprehensively investigates the thermal transient measurement approach of SiC MOSFETs using Vsd as the TSEP and focuses on how to obtain more reproducible thermal structural information. Comparing to a preliminary conference version, the contributions of this article are three folds:

    • Evaluated the impact of key testing conditions, including the gate turn-off voltage and sensing current, on the calibration based on static and dynamic tests. Three criteria are proposed to quantify the sensing current and two methods are proposed to justify the gate voltage.
    • Investigated how various parameters affect cooling curve measurement in terms of static and dynamic responses.
    • Derived a guideline of how to perform a reproducible thermal transient measurement of SiC MOSFETs with a proper selection of testing conditions and parameters.

    II. Thermal Transient Measurement

    Fig.1 illustrates the two major steps to perform the thermal transient measurement for a SiC MOSFET, namely, the temperature calibration and cooling curve measurement. The calibration is to obtain the relationship between the TSEP and the device temperature, which is controlled by an external system (e.g., an oven, a dielectric bath, or a temperature-controlled cooling plate). The MOSFET body diode pn junction voltage Vsd shows a linear temperature dependence given a small sensing current going through the device. By measuring Vsd under various temperatures, the relation of Vsd = f(T) can be calibrated.

    Note that a low enough negative gate voltage has to be applied to completely shut the MOSFET channel off during this process (see Fig.2). In the second step, cooling curve measurement is carried out based on two current levels: one is the heating current (Iheat) to heat the device up, and the other is the sensing current for temperature monitoring with a negligible self-heating impact, as shown in Fig. 1 (Step 2).

    Fig. 2. Structure of a SiC MOSFET

    Once Vsd is measured, the inversely calibrated T = f−1 (Vsd) in step 1 converts the measured voltage into the temperature. However, the temperature calibration is developed based on static conditions but the cooling curve is derived from dynamic voltage responses. The compatibility of the two steps has a prerequisite that the electrical disturbance is short and negligible. However, reference pointed out that SiC MOSFETs have much longer electrical disturbance compared to Si devices. Its impacts on thermal transient measurement are not fully understood and will be investigated in the following two sections.

    III. Calibration: Impact of Sensing Current

    To obtain reliable thermal transient measurement for SiC MOSFETs, the sensing current needs to be carefully selected to achieve good linearity, sensitivity, and low power dissipation. Additionally, to minimize unwanted electrical disturbances, a short sensing current pulse is preferable. In this section, three criteria are proposed to quantify the impacts of sensing current.

    A. Impact of Sensing Current Density on Static Performance

    1) Linearity: pn-junction voltage Vpn is used as TSEP due to its linear temperature dependence, which is given by

    E 1

    where Eg is band gap, q is the elementary charge, kb is Boltzmann constant, and A is a device-specific factor. These parameters are either independent of or have weak dependence on temperature. When a constant sensing current density jsense is applied, Vpn varies linearly with temperature T. However, for SiC MOSFETs, the voltage drops across the drift region, contact, and metallization can contribute significantly to Vsd when a high sensing current is used.

    Fig. 3. Calibration curves for multiple sensing currents

    Moreover, at high temperatures and low current densities, the negative temperature coefficient of body diode results in a smaller Vpn. All above phenomenon can jeopardize the linear temperature dependence of Vsd and needs to be properly dealt. Fig. 3(a) shows the calibration results for different sensing currents ranging from 5 mA to 1000 mA. The proper selection of sensing current can be justified by the linearity between Vsd and temperature, which is further assessed by Pearson correlation coefficient ρlinear with 1 indicating perfect linearity

    E 2

    where cov denotes the covariance, and σ is the standard deviation. The left part of Table I lists that a sensing current of Isense = 100 mA gives the best linearity, whereas smaller and larger sensing currents result in a slightly worse performance.


    2) Sensitivity: A viable TSEP sampling hardware requires a sensitivity SVT above 1 mV/K, which is defined as

    E 3

    Given a constant sensing current density, the temperature derivative of (1) yields

    E 4

    It indicates that when Vpn dominates the device’s voltage drop, the sensitivity decreases with the sensing current due to its negative logarithmic dependency in (4) and is also validated in the left part of Table I. All scenarios listed in the table meet the 1 mV/K requirement. Note that a higher or a lower SVT can also be selected according to the specific acquisition system.

    TABLE I--CALIBRATION RESULTS UNDER DIFFERENT SENSING CURRENTS AND GATE TURN-OFF VOLTAGES.-

    3) Self Dissipation: To ensure accurate junction temperature measurement in the cooling phase, the self heating effect of the sensing current shall be negligible. A self-dissipation ratio is defined as

    E 5

    where Psense is the power dissipated by the sensing current which is generated by the measured TSEP voltage Vsd@Isense under Isense. Prate is the rated power dissipation of the tested device provided in datasheet. Generally, Prate can cause more than 100 C junction temperature increase. ηsd ≤ 1% implies that the temperature increase by the sensing current is less than 1 C (regarded as negligible here). Table I shows, except the cases of 500 mA and 1000 mA, all other scenarios meet the requirement of ηsd ≤ 1%.

    B. Impact of Sensing Current Density on Dynamic Performance

    During the period from 1 to 2 in Fig. 1, electrical and thermal transients occur simultaneously. This coupling poses challenge to extract the correct cooling curve of power devices. To address this issue, the standard JESD 51-1 introduces a delay time (tMD) to remove unwanted electrical transients plus a linear extrapolation to estimate the temperature at t = 0 s.

    However, SiC MOSFETs are likely to suffer from long tMD, e.g., more than 600 µs under Isense = 5 mA in Fig. 3(b). It is much longer than the time scale of the chip’s thermal transient and hinders getting an accurate thermal structure property. However, by increasing Isense to 100 mA, tMD reduces to an acceptable 42 µs. Further increasing the sensing current has a limited effect on reducing tMD but rapidly increases the self-dissipation ratio.

    Taking both static and dynamic performances into account, a sensing current of 100 mA achieves better overall performance for this study case.

    IV. Calibration: Impact of Gate Voltage

    A. Gate Turn-Off Voltage Selection

    TCAD simulation in Fig. 4 shows that the electronic density changes dramatically in the channel region when the gate voltage varies from 0 V to -4 V but remains steady for a gate voltage less than -6 V to fully turn the channel off. This behavior is fundamentally different from Si devices, where a gate voltage of 0 V is sufficient as shown in Fig. 5(a).

    Fig.-4.-The-electronic-density-distribution-of-the-SiC-MOSFET-under-different-Vgsoff-in-TCAD-simulation
    Fig. 5. Static and dynamic impacts of the gate voltages on SiC MOSFET

    Although existing studies have experimentally shown that Vgsoff = −6 V is enough to turn off the channel of SiC MOSFETs, it may not be applicable to all SiC MOSFETs due to different die designs and manufacturing processes. Different devices will be discussed in Section VI-C and the following part will focus on two methods for gate turn-off voltage selection.

    1) Method 1 – Output Characteristic under Sensing Current: Output characteristic curves of body diode under the sensing current range can shift significantly from each other in case of insufficient gate voltages, such as Vgs = −3 V in Fig. 5(b) but start to overlap as the gate voltage approaches -6 V. To quantify this effects, an electrical conductance gdiode at the sensing current is defined as

    E 6-7

    When the entire current flows through the internal body diode, the conductance is independent of gate voltage and becomes a constant. The minimum Vgs ensuring a completely-off channel can then be identified by (7), for example, Vgs = −4.5 V for this case study as shown in Fig. 5(c).

    2) Method 2 – Calibration Curves with Varied Gate Voltages: The calibration curves show the relationship between the sensing current and TSEP, and shall overlap with each other under various gate voltage provided a fully turned-off MOSFET channel. At the meantime, TSEP is linearly dependent on temperature. Therefore, similar to method 1, the criteria defined in (8) can be introduced to identify the minimum reasonable gate tun off voltage, which is a slightly different Vgs < −5 V than Vgs < −4.5 V as shown in Fig. 5(d).

    E 8
    B. Static and Dynamic Impacts of Gate Voltages

    The calibration results under various gate voltage are also evaluated with respect to the linearity, sensitivity, and self-dissipation ratio. The measured results and its analytical summary are show in Fig. 5(d) and the right-hand side of Table I. When the gate voltage changes from 0 V to -3 V, the linearity deteriorates significantly compared to the other gate voltages. This poor linearity indicates that the measured Vsd is not primarily determined by the pn junction.

    Moreover, by adjusting the gate turn-off voltage from 0 V to -8 V, the sensitivity and the self-dissipation ratio changes minorly. Regarding the dynamic behavior, the time delays under varied turn-on and turn-off gate voltages are investigated in Figs. 5(f) and (g), respectively. The effect of the gate voltage on the measurement delay time is almost negligible. Within the device’s maximum allowable gate voltage range, a lower gate turn-off voltage can improve the static behavior without significantly affecting the dynamic performance of the thermal transient measurement.

    V. Cooling Curve Measurement

    Once the calibration is completed, the established relationship between Vsd and temperature can be utilized for cooling curve measurements, where the selection and impacts of heating current, gate turn-on voltage etc. will be evaluated.

    A. Impact of Sensing Current

    Fig. 6(a) shows the cooling curves of a SiC MOSFET under same test conditions except the sensing current. Ideally, the two measurements shall overlap completely. However, the case with Isense = 5 mA takes 663 µs to reach the state 2 , comparing to only 42 µs under Isense = 100 mA. This is due to the fact that the body diode requires sufficient minority carrier charge accumulation to turn on, and it takes longer for a smaller sensing current.

    Fig. 6. Cooling curve measurement under varied conditions

    The above measurements validate the dynamic study in Section III-B. Furthermore, the frequency analysis in Fig. 6(b) shows measurements with Isense = 5 mA exhibit large high-frequency noises, while it decays rapidly when Isense = 100 mA. At a certain bandwidth ∆f of the measurement, the noise can be modeled as a Johnson-Nyquist form, that is,

    E 9

    where Rpn is the resistance of the body diode at Isense, i.e., Rpn ≈ kbT /qIsense. It indicates that the noise in the measured voltage diminishes with the square root of the sensing current. Thus, a higher sensing current is advantageous for both shorter electric transients and lower noise.

    B. Impact of Gate Turn-Off Voltage

    Fig. 6 c) illustrates a series of cooling curves measured under various gate voltages. (Note that each cooling measurement shares the same gate voltage with its used calibration curve, which can be found in Table I). Abnormal temperature rises at approximately 2×10−4 s can be observed with severely insufficient gate voltages (e.g., 0 V and -1 V) but disappears with gate voltages less than -3 V.

    This phenomenon is inconsistent with physical principles as the cooling stage does not involve any heat injection and therefore junction temperature rise shall not appear. Similar behavior is also observed with a conclusion of imperfect SiC MOSFET structure. Another reason for this inconsistency can be the insufficient gate turn-off voltage based on above findings. Moreover, temperature measurements go below the ambient temperature of 25 C for voltages less than -3 V but turn normal by further lowering voltage to -6 V and beyond.

    Similar effects can be observed in Fig. 6(d) where the thermal impedance curves, reflecting the thermal structure of a semiconductor package, remains unchanged until the sufficient enough gate voltage is applied. These inconsistencies underscore the significance of the gate turn-off voltage.

    C. Impact of Gate Turn-On Voltage and Heating Current

    Gate turn-on voltage decides the channel voltage drop in the heating stage. Together with the heating current, a higher power dissipation results in a higher junction temperature. A maximum temperature difference of up to 20 C and 80 C are observed in Fig. 6(e) and (g) for different Vgson and Iheat. The derived thermal impedance curves, however, barely change as shown in Fig. 6(f) and (h). Additionally, the measurement delay time remains unchanged. Thus, conclusion can be made that Vgson and Iheat have negligible affect on the thermal characterization given a sufficient gate turn-off voltage and sensing current.


    VI. A Guideline for Reproducible Transient Thermal Measurements of SiC MOSFETs


    A. Junction-to-Case Thermal Impedance Measurement

    Cooling curve measurement evaluates the thermal impedance from the device junction temperature to the ambient. More importantly, it can be used to identify the junction-to-case thermal impedance, which attracts more industrial interest. The JESD 51-14 standard clearly states the procedure by using transient dual interface approach. The overall principle is to conduct two transient thermal measurements of the identical device but with and without thermal interface material (denoted as tim and dry, respectively).

    The two derived thermal curves start to separate as soon as the heat flow enters the TIM layer due to the surface roughness between package and cold-plate. Same procedure is followed in this paper based on the testing platform in Fig. 7(a) and previously identified test conditions of Vgs_off = -6 V and Isense = 100 mA. Subsequently, the cooling curves and thermal impedance curves are obtained as shown in Fig. 7(b) and (c). A clear separation point, or namely junction-to-case thermal impedance, can be observed at 0.8 K/W in Fig. 7(c) and in the thermal structure function curve in Fig. 7(d).

    Fig. 7. Experimental measurement of junction-to-case thermal impedance of the SiC MOSFET
    B. Transient Thermal Measurement Guideline

    Based on the analysis and results discussed earlier, a flowchart to achieve a reproducible transient thermal measurement is provided in Fig. 8. It is evident that the gate turn-off voltage (Vgsoff) is a critical parameter that needs to be determined initially. Method 1 or 2 from Section IV-A can be applied. Certain margin can be added within the maximum gate voltage too as it benefits both static and dynamic states.

    Subsequently, the sensing current (Isense) should be carefully selected. Too large or small sensing currents may not be conducive to accurate transient thermal measurements. It is important to ensure that the pn-junction dominates the measured drain-source voltage (Vsd) in terms of linearity, sensitivity, self-dissipation ratio, and measurement delay. Both the static and dynamic states should be evaluated comprehensively.

    Fig. 8. A flowchart for reproducible transient thermal measurement.

    Once Vgsoff and Isense have been determined, the cooling curve measurement can be conducted accordingly. A final validation process can be added by varying the heating current (Iheat) or gate turn-on voltage (Vgsoff) to further validate the accuracy and reproducibility of the measurements.

    C. Viability Validation

    To validate the viability of the proposed flow, three additional devices from different vendors are tested with key information listed in Table II. Device 1 has been investigated in Section IV-V in detail. Fig. 9 shows the results of determining Vgsoff based on method 2. It is apparent that Vgsoff = −6 V, employed by multiple existing studies, is not sufficient enough for device 3 and 4 that require -10 V and -13 V to turn their channel off completely.

    Fig. 9. Selection of Vgsoff and Isense for additional three different devices listed in Table II

    But it should be noted that these two values exceed the maximum allowable gate voltages according to devices data sheet. It implies that the current thermal transient measurement method based on Vsd may not be applicable to device 3 and 4 without exceeding the maximum gate turn-off voltage. Moreover, the selection of Isense with respect to the dynamic performance can be found in Fig. 9 together with the corresponding static performances listed in Table II. 100 mA is a proper sensing current for all 4 devices due to the short tMD and negligible self dissipation. It should be noted that the sensing current is around 5.26 ‰ of the rated current of the SiC MOSFET, which is different from Si devices.

    TABLE II--COMPARISON OF DIFFERENT DEVICES

    VII. Conclusion

    This paper investigates the thermal characterization of SiC MOSFET based on the body diode source-drain voltage. Two key steps, namely the calibration and cooling curve measurement, are evaluated comprehensively. The selection of key testing conditions, i.e., sensing/heating currents, gate turn-off/turn-on voltages, are thoroughly assessed based on their impacts on the thermal characterization and the following conclusions are achieved:

    1. Low enough gate turn-off voltage shall be used in both calibration and cooling curve measurement to ensure a completely shut channel and correct thermal impedance measurement. However, the required negative gate voltage may exceed the maximum allowable range, which causes the current thermal transient measurement method based on Vsd being not available for these devices within the maximum allowable gate voltage.
    2. Insufficient sensing current deteriorates the dynamics in terms of longer electrical disturbance and more noises, while too large sensing current sacrifices the steady-state performance in particular of a large self dissipation ratio.
    3. Gate turn-on voltage and heating current have negligible impacts on the measured thermal impedance. The consistency of the thermal impedance under varied gate turn-on voltage or heating current can be used as a validation.

    Besides, a guide flowchart to perform reproducible transient thermal measurement for SiC MOSFETs is provided in this paper, which includes the selection of the electrical parameters and a validation process.

    Authors

    Yi Zhang, Yichi Zhang, Zhiliang Xu, Zhongxu Wang, Voon Hon Wong, Zhebie Lu, Antonio Caruso

    Original – Research Gate

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